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(root)/trunk/kernel/arch/sparc64/include/register.h @ 4584 – Rev 3672

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Rev	Age	Author	Path	Log message	Diff
3672	5813 d 23 h	jermar	/trunk/	Merge sparc branch to trunk.
2071	6501 d 23 h	jermar	/trunk/	(c) versus (C)
1899	6615 d 6 h	jermar	/trunk/	sparc64 work: - Loader now starts all processors. - Kernel halts all but the bootstrup processor for now. - Read clock-frequency from the respective processor node in the device tree
1882	6628 d 6 h	jermar	/trunk/kernel/	Support for sparc64 FPU context.
1789	6690 d 4 h	jermar	/trunk/	Fix ofw_memmap() in boot infrastructure. The cell size is 32-bit and not equal sizeof(ofw_arg_t). Define architecture dependant #address-cells and #size-cells for cases the respective properties are missing in the OpenFirmware device tree. The algorithm now works both for ppc32 and sparc64. Add memmap_t, screen_t and keyboard_t to sparc64 bootinfo structure. Be more verbose during sparc64 boot. Move ALIGN_UP to generic part of boot/. Change header guards in several places so that they don't contain double underscore.
1787	6692 d 1 h	decky	/	move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot
1784	6692 d 22 h	jermar	/kernel/trunk/	Sync OpenFirmware functionality with boot. Random cleanup.
1780	6699 d 2 h	jermar	/kernel/trunk/	Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).
1702	6720 d 5 h	cejka	/kernel/trunk/	Kernel doxygen comments updated.
664	6889 d 18 h	jermar	/kernel/trunk/	sparc64 work. Interrupt Levels 1 - 15 serviced. Minor changes in the exc_* functions.
658	6893 d 8 h	jermar	/kernel/trunk/arch/sparc64/include/	sparc64 work. Add functions to read and write TICK and TICK_compare registers. Add types describing TICK and TICK_compare registers.
650	6895 d 21 h	jermar	/kernel/trunk/	sparc64 work. Implement interrupt_disable(), interrupt_enable(), interrupt_restore() and interrupt_read() functions. Fix context save/restore to save/restore register %i7.
640	6897 d 20 h	jermar	/kernel/trunk/	sparc64 work. CPU identification.