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Rev Age Author Path Log message Diff
3929 5749 d 1 h jermar /trunk/kernel/arch/ Introduce ioport8_t, ioport16_t and ioport32_t. These types are to be used with
pio_read_n() and pio_write_n() functions. This breaks everything.
 
3902 5753 d 7 h jermar /trunk/kernel/ Introduce a more platform-neutral name for programmed I/O.

The new API looks like pio_read_n() or pio_write_n(), where n is 8, 16 or 32.
The old API (i.e. inb(), inw(), inl(), outb() outw(), outl()) may have made
some people think that the interface is only to be used with the separate I/O
space. That's not the case. This API is to be implemented on all platforms
so that we can finally have really generic kernel device drivers.
 
3672 5825 d 3 h jermar /trunk/ Merge sparc branch to trunk.  
3580 5849 d 1 h jermar /trunk/kernel/arch/sparc64/include/ Accesses to memory mapped registers should use volatile pointers so that
the compiler doesn't even think of trying to be clever. Add memory barriers
and fixed cstyle.
 
3577 5849 d 15 h vana /trunk/kernel/ Support for serial port console on IA64 as a compensation for keyboard - based on SPARC ns16550 driver  
3071 6010 d 8 h decky /trunk/kernel/ reflect changes in generic code
proper formatting directives
coding style
 
2089 6502 d 9 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes
 
2082 6508 d 10 h decky /trunk/ __asm__ __volatile__ -> asm volatile  
2071 6513 d 2 h jermar /trunk/ (c) versus (C)  
2068 6520 d 10 h jermar /trunk/kernel/ Formatting and indentation fixes.  
1911 6616 d 0 h jermar /trunk/kernel/ Add support for interrupt mapping in the Sabre PCI controller.
Add support for PCI and EBUS interrupt mapping via the OpenFirmware device tree.
Unfortunatelly, the code is not capable enough to earn single ns16550 interrupt.
I suspect something needs to be enabled in the EBUS registers.
 
1899 6626 d 10 h jermar /trunk/ sparc64 work:
- Loader now starts all processors.
- Kernel halts all but the bootstrup processor for now.
- Read clock-frequency from the respective processor node in the device tree
 
1885 6638 d 14 h jermar /trunk/kernel/arch/sparc64/include/ On sparc64, get_stack_base() must use the unbiased %sp (i.e. %sp + 2047).  
1882 6639 d 9 h jermar /trunk/kernel/ Support for sparc64 FPU context.  
1881 6640 d 10 h jermar /trunk/ sparc64 work:
- find a CPU node and read its clock_frequency attribute
- implement asm_delay_loop()
- set TICK_COMPARE register according to processor frequency
- small improvements at random places

OpenFirmware work:
- two new functions for walking the device tree

Generic boot loader work:
- added basic string functions

Usual pile of indentation and formatting fixes.
 
1880 6642 d 1 h jermar /trunk/ Small improvements here and there.  
1865 6648 d 4 h jermar /trunk/kernel/ sparc64 kernel fixes  
1864 6648 d 23 h jermar /trunk/ sparc64 update.
- Prototype userspace layer implementation that
at least relates to sparc64 and compiles cleanly.
- Fixes for kernel's preemptible_handler and code
related to running userspace.
- Enable userspace. Several dozen instructions
are now run in userspace! We are pretty near
the userspace milestone for sparc64.
 
1860 6652 d 4 h jermar /trunk/kernel/ A lot of untested sparc64 stuff:
- Write ASID to hardware when a thread is about to run in userspace.
- Add userspace() and switch_to_userspace() functions.
- Handle special cases when the userspace spill/fill handler causes MMU trap.
- Resolve some TODOs in the existing sparc64 code.
- sparc64 has now C99 compliant header guards.
- Formatting and indentation fixes.
 
1856 6653 d 11 h jermar /trunk/kernel/ sparc64 work.
- Modify before_thread_runs_arch() to store addresses of the kernel stack and
userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.
- Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
- Implement trap handler for spilling register windows into userspace window buffer.
- Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
- Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,
spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes.
 

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