| Rev |
Age |
Author |
Path |
Log message |
Diff |
| 1858 |
6652 d 7 h |
jermar |
/trunk/kernel/arch/sparc64/src/trap/ |
sparc64 work.
Handle situation when there are more valid windows than NWINDOW - 2 during
the return to userspace in preemtpible_handler(). |
|
| 1857 |
6653 d 2 h |
jermar |
/trunk/kernel/arch/sparc64/ |
sparc64 work.
More bits needed to reach the userspace milestone were added.
The preemptible_handler(), still a prototype, now contains all functionality it needs.
Some sanitation was added to functions expecting page-aligned pointers to
userspace window buffer. |
|
| 1856 |
6653 d 7 h |
jermar |
/trunk/kernel/ |
sparc64 work.
- Modify before_thread_runs_arch() to store addresses of the kernel stack and
userspace window buffer, resp., to registers %g6 and %g7, resp, in the
alternate and interrupt global sets.
- Modify after_thread_ran_arch() to sample %g7 from the alternate globals.
- Implement trap handler for spilling register windows into userspace window buffer.
- Implement assembly language functions to access %g6 and %g7 registers in the alternate sets.
- Initialize the trap table so that there are now also spill_1_normal, spill_2_normal,
spill_0_other and fill_1_normal handlers. These handlers are used in different situations
and for different purposes. |
|
| 1855 |
6654 d 3 h |
jermar |
/trunk/kernel/ |
sparc64 work.
Fix bug introduced in revision 1852. When fixing CWP,
the input registers of the current window (i.e. output
registers of the window belonging to the interrupted
context) must be preserved. Preserve those registers
in memory. Sure there exist more efficient ways how to
copy the inputs.
Simplify before_thread_runs_arch(), resp. after_thread_ran_arch(),
and make them install, resp. uninstall, DTLB locked mapping for
eventual userspace window buffer. |
|
| 1854 |
6654 d 7 h |
jermar |
/trunk/kernel/ |
Define architecture-specific thread sub-constructors and sub-destructors on all architectures.
Define the THREAD_FLAG_USPACE which means that the thread runs in user space.
The forementioned changes allow for allocating of user window buffer on sparc64
threads that execute in userspace.
A lot of formatting and indentation fixes. |
|
| 1853 |
6656 d 23 h |
jermar |
/trunk/kernel/arch/sparc64/include/ |
Remove PSTATE from istate. |
|
| 1852 |
6656 d 23 h |
jermar |
/trunk/kernel/ |
sparc64 work.
Bunch of changes in preparation for sparc64 mm and userspace support.
Fix alignment of hardcoded_* variables in linker script. |
|
| 1851 |
6662 d 5 h |
jermar |
/trunk/kernel/ |
sparc64 work.
Define the istate structure.
Move the identity-mapping handler to assembly.
Make the preemptible handler more general so that TL=1 MMU exceptions can make use of it.
Little bit of formatting and indentation. |
|
| 1849 |
6666 d 6 h |
jermar |
/trunk/kernel/ |
sparc64 work.
interrupt_vector trap experimental handling.
Minimal reverse-engineered FireHose Controller driver (documentation needed!).
Keyboard on Sun Enterprise is now interrupt driven. Keyboard on Sun Ultra
is still polled. |
|
| 1848 |
6672 d 9 h |
jermar |
/trunk/kernel/ |
Rework the z8530 driver so that it is based on z8530 specification rather
than on accidental and limited "compatibility" with i8042. |
|
| 1844 |
6674 d 0 h |
jermar |
/trunk/kernel/ |
Add an option to compile the sparc64 kernel for Ultra 5 or Enterprise E6500.
Basic keyboard support (polling) based on ns16550 serial port (deployed on Ultra). |
|
| 1842 |
6674 d 5 h |
jermar |
/trunk/kernel/ |
i8042 and z8530 separated, the tree compiles again.
Now there is some duplicated code in i8042.c and z8530.c,
but that can be eliminated in slower pace. |
|
| 1841 |
6674 d 6 h |
jermar |
/trunk/kernel/ |
Start reorganization of different keyboard drivers.
What seemed like a screwed i8042 chip appears to be
Zilog 8530.
The repository won't compile now. To be fixed in next commits. |
|
| 1838 |
6679 d 2 h |
jermar |
/trunk/kernel/ |
Add scan code map for Sun keyboard. |
|
| 1837 |
6679 d 10 h |
jermar |
/trunk/ |
Support 24bpp framebuffers with 4 pixelbytes (each pixel aligned on 32-bits).
At least on sparc64, the OpenFirmware linebytes property specifies the number
of pixels between consecutive scan lines of the display. Fix scanilne calculation,
including possible alignment.
Add note to 8bpp pixel functions pointing out drawbacks of that mode. |
|
| 1823 |
6682 d 2 h |
jermar |
/trunk/kernel/arch/sparc64/ |
sparc64 work.
Dump take_over_tlb_and_tt() and add its assembly language replacement. |
|
| 1822 |
6682 d 7 h |
jermar |
/trunk/ |
sparc64 work.
1. Formatting fixes.
2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
3. Substantial changes in the way the TLB is taken over.
4. Remove unneeded functions.
This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.
Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow. |
|
| 1802 |
6697 d 17 h |
decky |
/trunk/ |
cleanup and unify the build system |
|
| 1793 |
6700 d 6 h |
jermar |
/trunk/kernel/ |
Change hw_map() on sparc64 to use virtual addresses that are
beyond the end of physical memory. It is beneficial in two
ways: first, physical memory is no longer being wasted by
otherwise necessary calls to frame_alloc() and, second,
virtual addresses for devices are now correctly allocated
and do not overlap with the 4M TLB-locked mapping for
kernel text and data. |
|
| 1792 |
6700 d 20 h |
jermar |
/trunk/ |
Move functionality of tlb_arch_init() to take_over_tlb_and_tt().
Call take_over_tlb_and_tt() very early after the kernel starts
executing. |
|