Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/src/proc/scheduler.c/ – Rev 1187

Filtering Options

From rev	To rev	Max revs

Search history for

Show All

Rev	Age	Author	Path	Log message
1187	6793 d 16 h	jermar	/kernel/trunk/	Cleanup pm.c and pm.h code on ia32 and amd64. Add before_task_runs() and before_task_runs_arch() for each architecture. Add ia32 and amd64 code to ensure I/O Permission Bitmap update.
1138	6810 d 17 h	jermar	/kernel/trunk/	CPU stacks must have two frames on ia64. Make sure both thread stack frames are mapped in before_thread_runs_arch(). Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp().
993	6823 d 14 h	jermar	/kernel/trunk/arch/ia64/	Fix bug in switch to userspace on ia64: ensure start in bank 1. Fix bug in tlb_invalidate_all() that cause interrupts to be unconditionally enabled. Optimize context switching by discarding packed attribute of context structures.
935	6825 d 16 h	vana	/kernel/trunk/	Two frame stack (standard stack + RSE) on Itanium
916	6830 d 23 h	jermar	/kernel/trunk/arch/ia64/src/	ia64 work. Support switch from userspace register stack in heavyweight handler.
912	6832 d 13 h	jermar	/kernel/trunk/	ia64 work. ivt.S: Detect userspace stack in heavyweight handler and switch to kernel stack. Remember the old stack pointer. As for register stack, kernel stack is assumed still. Fix alignment issues that showed when STACK_ITEMS was odd. Fix ld8 instruction that did subtraction of 8 instead of addition of 8. scheduler.c: Change before_thread_runs_arch() to calculate address of top of the stack for the interrupt handler.
911	6832 d 18 h	jermar	/kernel/trunk/arch/ia64/	ia64 work. Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1. This prevents userspace from the possibility to see what addresses are being used by kernel. Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be able to read the address of its kernel stack. Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit thread's combined register and memory stack. (RSE can write out as many as 16K.)
903	6835 d 16 h	jermar	/kernel/trunk/arch/ia64/	ia64 work. Add code needed for running multiple address spaces and location of kernel stack after switch from userspace.
902	6836 d 21 h	jermar	/kernel/trunk/	ia64 work. More capable TLB miss handlers. The ia64 kernel now passes mm/mapping1 test. Fix generic hash table to properly initialize lists. Change page_ht() to properly initialize inserted PTE's. Change format of generic page hash table PTE's.
901	6836 d 23 h	jermar	/kernel/trunk/arch/	ia64 work. Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler. Add before_thread_runs_arch() that maps kstack, if necessary. Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.