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(root)/kernel/trunk/arch/amd64/src/cpu/cpu.c – Rev 630

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Rev	Age	Author	Path	Log message	Diff
625	6909 d 13 h	palkovsky	/kernel/trunk/	We are now almost -Wall clean. - redefined atomic_t - deleted many, many unused variables - some minor code cleanups found using compiler warning.
534	6920 d 9 h	jermar	/	Rename HelenOS/SPARTAN to HelenOS/kernel again.
532	6920 d 9 h	jermar	/	Revert renaming of HelenOS/SPARTAN to HelenOS/kernel because of important pending patch.
501	6932 d 14 h	jermar	/	Rename HelenOS/SPARTAN to HelenOS/kernel.
391	6981 d 7 h	jermar	/SPARTAN/trunk/	mips32 memory management work. TLB Refill Exception implemented (passed basic testing). Remove bit g from struct entry_hi. Add generic find_mapping(). Add asid to vm_t type, define asid_t to hide architecture specific differences. Implement ASID allocation for mips32, dummy for other architectures. Add THE->vm (a.k.a. VM). Add vm_install_arch(). Move pte_t definition to arch/types.h on each architecture. Fix PTL manipulating functions on mips32 to shift pfn by 12 instead of by 14. Fix tlb_init_arch() to initialize all entries. Other. Remove unnecessary header files from arch.h Add missing headers here and there. Remove two unnecessary ld flags from mips32 makefile.
309	7009 d 19 h	palkovsky	/SPARTAN/trunk/	Added architecture independent hooks for fpu lazy context switching. It is enabled by defining FPU_LAZY
282	7011 d 20 h	palkovsky	/SPARTAN/trunk/	Fixed gdtr naming issues after ia32 changes. Fixed stack alignment on new thread to by multiple of 16, we are now ABI-correct and we do not #GP on va_arg to boot. Fixed bad exception register names reporting. Fixed bad _hardcoded_load_addr, which caused allocation of kernel text frames.
257	7012 d 19 h	palkovsky	/SPARTAN/trunk/	Added basic FPU context (not working). Added CPU utilities from ia32 Fixed bug in vm.c that wanted PTL to be mapped in bottom memory.
251	7013 d 4 h	palkovsky	/SPARTAN/trunk/	Changes, that were needed to make it work on Bochs. - We CAN use the NX bit in paging tables, but we have to initialize the NXE bit in EFER register first.