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Rev	Age	Author	Path	Log message
2307	6405 d 12 h	hudecek	/branches/rcu/	Updated branch to latest trunk revision
2131	6448 d 17 h	decky	/branches/	add development branches
2089	6503 d 21 h	decky	/trunk/	huge type system cleanup remove cyclical type dependencies across multiple header files many minor coding style fixes
2071	6514 d 13 h	jermar	/trunk/	(c) versus (C)
2054	6542 d 12 h	jermar	/trunk/kernel/	Fix important comment in kernel/arch/sparc64/src/proc/scheduler.c. Improve framebuffer code. Formatting and indentation fixes.
1946	6604 d 11 h	jermar	/trunk/kernel/arch/sparc64/	sparc64 work. - Improve panic screen on data_access_exception by dumping contents of DSFSR and DSFAR. - Change the FHC enable interrupt code to only set the IMAP_V bit.
1864	6650 d 10 h	jermar	/trunk/	sparc64 update. - Prototype userspace layer implementation that at least relates to sparc64 and compiles cleanly. - Fixes for kernel's preemptible_handler and code related to running userspace. - Enable userspace. Several dozen instructions are now run in userspace! We are pretty near the userspace milestone for sparc64.
1860	6653 d 15 h	jermar	/trunk/kernel/	A lot of untested sparc64 stuff: - Write ASID to hardware when a thread is about to run in userspace. - Add userspace() and switch_to_userspace() functions. - Handle special cases when the userspace spill/fill handler causes MMU trap. - Resolve some TODOs in the existing sparc64 code. - sparc64 has now C99 compliant header guards. - Formatting and indentation fixes.
1851	6663 d 20 h	jermar	/trunk/kernel/	sparc64 work. Define the istate structure. Move the identity-mapping handler to assembly. Make the preemptible handler more general so that TL=1 MMU exceptions can make use of it. Little bit of formatting and indentation.
1823	6683 d 18 h	jermar	/trunk/kernel/arch/sparc64/	sparc64 work. Dump take_over_tlb_and_tt() and add its assembly language replacement.
1822	6683 d 23 h	jermar	/trunk/	sparc64 work. 1. Formatting fixes. 2. When writing to DMMU ASI's, simple membar() can be used in place of flush(). 3. Substantial changes in the way the TLB is taken over. 4. Remove unneeded functions. This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi processor. Note that 3. needs further work as the current implementation depends on the fact that the compiler will use registers for local variables in take_over_tlb_and_tt(). Rewrite of that function into assembly is to follow.
1787	6704 d 16 h	decky	/	move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot
1780	6711 d 17 h	jermar	/kernel/trunk/	Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).
1702	6732 d 20 h	cejka	/kernel/trunk/	Kernel doxygen comments updated.
901	6836 d 23 h	jermar	/kernel/trunk/arch/	ia64 work. Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler. Add before_thread_runs_arch() that maps kstack, if necessary. Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.
897	6838 d 10 h	jermar	/kernel/trunk/	sparc64 work. Fix KBD_VIRT_ADDRESS. Call before_thread_runs() prior to the switch to the thread's stack. Add comment why this is crucial. Add after_thread_ran() to the scheduler. Add before_thread_runs_arch() and after_thread_ran_arch() for sparc64, mapping/demapping thread's kernel stack. Add dummy after_thread_ran_arch() to all other architectures. Add dtlb_insert_mapping() to promote code reuse.
877	6841 d 14 h	jermar	/kernel/trunk/arch/sparc64/	Fixes in sparc64 preliminary TLB miss handler. Compute and insert identity mapping for kernel on the fly.
873	6841 d 22 h	jermar	/kernel/trunk/arch/sparc64/	sparc64 work. Add more MMU helper functions and make data TLB miss handler more verbose.
863	6844 d 10 h	jermar	/kernel/trunk/arch/sparc64/	sparc64 work. Add initial TLB miss handlers.
658	6905 d 23 h	jermar	/kernel/trunk/arch/sparc64/include/	sparc64 work. Add functions to read and write TICK and TICK_compare registers. Add types describing TICK and TICK_compare registers.

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