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Rev Age Author Path Log message Diff
2927 6015 d 16 h decky /branches/dynload/ added dynload branch  
2860 6045 d 6 h cejka /trunk/ Context handling unified for sparc64.  
2797 6057 d 6 h jermar /trunk/kernel/ Each architecture should only announce its endianity.
The conversion macros should be defined only once.
 
2794 6058 d 6 h jermar /trunk/kernel/ Add macros for byte swapping of uint16_t's.  
2725 6114 d 12 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)
 
2721 6115 d 12 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2610 6196 d 10 h jermar /trunk/ Support for six syscall arguments for sparc64.
There is a minor stability issue which needs to be fixed (kernel panics upon entering kconsole from the
console task).
 
2510 6268 d 6 h jermar /trunk/kernel/ Experimental support for the cgsix framebuffer, which is found on old Ultra 1
worksations, and the SBUS bus and devices. Not tested.
 
2272 6407 d 8 h jermar /trunk/kernel/ Indentation and formatting fixes.  
2231 6417 d 10 h jermar /trunk/kernel/arch/sparc64/ Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur.
 
2216 6419 d 6 h decky /trunk/ make thread ID 64 bit (task ID is 64 bit already)
cleanup thread syscalls
 
2143 6429 d 10 h jermar /trunk/kernel/arch/sparc64/include/ Remove unneeded enum member.  
2141 6430 d 2 h jermar /trunk/ The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.

Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.
 
2134 6431 d 6 h jermar /trunk/kernel/ Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).

If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.

I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.

This solves ticket #26.
 
2129 6466 d 5 h jermar /trunk/ Fix small problem in sparc64 port.

Bump version to 0.2.0.4 (Sunset).
 
2106 6482 d 13 h jermar /trunk/kernel/ Merge as_t structure into one and leave the differring parts in as_genarch_t.

Indentation and formatting changes in header files.
 
2105 6486 d 13 h decky /trunk/kernel/ move ipc structures to ipc.h  
2089 6488 d 13 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes
 
2083 6494 d 12 h decky /trunk/kernel/ typedef elimination  
2082 6494 d 13 h decky /trunk/ __asm__ __volatile__ -> asm volatile  

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