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mm
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cache.S
– Rev 4055
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4055
5772 d 8 h
trochtova
/branches/dd/
changes in trunk (rev 4054) merged into dd branch
3022
6055 d 10 h
decky
/branches/dd/
device drivers branch
2252
6465 d 0 h
jermar
/trunk/kernel/arch/sparc64/src/mm/
Move one MEMBAR instruction from a delay slot,
which is, due to SF Erratum #51, a potentionally
dangerous place for a MEMBAR to be.
2141
6483 d 22 h
jermar
/trunk/
The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.
Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.
2076
6551 d 9 h
jermar
/trunk/kernel/
Beat the implicit illegal virtual alias created by reusing userspace frames.
In the anonymous and ELF backends, if the architecture has virtually indexed D-cache,
selectively flush cachelines belonging to the frame being freed.
This fixes Ticket #20.
2071
6553 d 1 h
jermar
/trunk/
(c) versus (C)
2016
6590 d 8 h
jermar
/trunk/kernel/arch/sparc64/src/mm/
The D-cache line size is actually 32 bytes on UltraSPARC II, IIi (and also IIe).
2009
6597 d 0 h
jermar
/trunk/kernel/
Initial support for handling illegal virtual aliases on sparc64.
2008
6599 d 1 h
jermar
/trunk/kernel/arch/sparc64/
Add dcache_flush() function that flushes D-Cache on sparc64.