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Rev Age Author Path Log message Diff
4688 5721 d 6 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4687)  
4678 5725 d 9 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4677)  
4668 5731 d 22 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4667)  
4537 5772 d 9 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4536)  
4420 5797 d 5 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4419)  
4300 5831 d 1 h trochtova /branches/dd/ dd branch - fixed a bug in ia32 port (some directories were missing), pci 'driver' converted to lspci  
4296 5832 d 1 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4295)  
4221 5845 d 6 h trochtova /branches/dd/ Added missing file.  
4201 5847 d 7 h trochtova /branches/dd/ changes in trunk (rev 4200) merged into dd branch  
4156 5860 d 3 h trochtova /branches/dd/ changes in trunk (rev 4155) merged into dd branch  
4055 5871 d 5 h trochtova /branches/dd/ changes in trunk (rev 4054) merged into dd branch  
3022 6154 d 7 h decky /branches/dd/ device drivers branch  
2861 6196 d 23 h cejka /trunk/ Used common macro for context saving on ppc64.  
2860 6197 d 22 h cejka /trunk/ Context handling unified for sparc64.  
2797 6209 d 22 h jermar /trunk/kernel/ Each architecture should only announce its endianity.
The conversion macros should be defined only once.
 
2794 6210 d 22 h jermar /trunk/kernel/ Add macros for byte swapping of uint16_t's.  
2784 6224 d 21 h jermar /trunk/kernel/arch/ Fortify ia32 and amd64 kernels against mallicious uspace applications that set
DF prior to entering the kernel. For AMD64 syscalls, we don't use the CLD
instruction, but make use of the SFMASK MSR instead. Simics works fine with
it, but QEMU seems to have a problem.
 
2783 6224 d 22 h jermar /trunk/kernel/arch/amd64/src/cpu/ Fix cstyle.  
2781 6229 d 5 h cejka /trunk/ Unified context saving/restoring macros in ppc32.  
2780 6229 d 6 h cejka /trunk/ Fixed broken context_offset.h symlinks for mips32eb and ia32xen.  

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