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Rev Age Author Path Log message Diff
4581 5608 d 1 h mejdrech /branches/network/ Net: synchronized with trunk rev.4580  
4327 5671 d 11 h mejdrech /branches/network/ Net: *merged with trunk 4326, +ne2k irq debug  
4153 5709 d 0 h mejdrech /branches/network/ Networking: merged with trunk changes  
3386 5905 d 3 h decky /branches/network/ add new network branch (copy of current trunk)  
3233 5943 d 4 h decky /trunk/ remove dummy page coloring facility, which is currenty not used  
3145 5985 d 11 h jermar /trunk/kernel/arch/sparc64/include/ On sparc64, when the operand to the FLUSH instruction doesn't matter, the
instruction's semantics is to flush the pipeline.
 
3133 5986 d 23 h jermar /trunk/kernel/arch/ Add smc_coherence() macro to all architectures.
So far, only amd64, ia32, ia64 and sparc64 are implemented.
 
2725 6115 d 5 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)
 
2721 6116 d 5 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2231 6418 d 3 h jermar /trunk/kernel/arch/sparc64/ Fix a nasty bug in the TLB miss handlers on sparc64.
After we no longer lock the kernel stack in the DTLB,
there is a real danger of nested DTLB misses. The nested
miss can very easily clobber the DTLB Tag Access register.
Therefore, the original miss may not read this register, but
it has to receive its value as an argument. The argument
value is saved in the trap table when it is guaranteed that
the nested TLB miss will not occur.
 
2141 6430 d 20 h jermar /trunk/ The Ultimate Solution To Illegal Virtual Aliases.
It is better to avoid them completely than to fight them.
Switch the sparc64 port to 16K pages. The TLBs and TSBs
continue to operate with 8K pages only. Page tables and
other generic parts operate with 16K pages.

Because the MMU doesn't support 16K directly, each 16K
page is emulated by a pair of 8K pages. With 16K pages,
illegal aliases cannot be created in 16K D-cache.
 
2134 6432 d 0 h jermar /trunk/kernel/ Reworked handling of illegal virtual aliases caused by frame reuse.
We moved the incomplete handling from backend's frame method to
backend's page_fault method. The page_fault method is the one that
can create an illegal alias if it writes the userspace frame using
kernel address with a different page color than the page to which is
this frame mapped in userspace. When we detect this, we do D-cache
shootdown on all processors (!!!).

If we add code that accesses userspace memory from kernel address
space, we will have to check for illegal virtual aliases at all such
places.

I tested this on a 4-way simulated E6500 and a real-world Ultra 5,
which has unfortunatelly only one processor.

This solves ticket #26.
 
2106 6483 d 6 h jermar /trunk/kernel/ Merge as_t structure into one and leave the differring parts in as_genarch_t.

Indentation and formatting changes in header files.
 
2105 6487 d 6 h decky /trunk/kernel/ move ipc structures to ipc.h  
2089 6489 d 6 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes
 
2076 6498 d 7 h jermar /trunk/kernel/ Beat the implicit illegal virtual alias created by reusing userspace frames.
In the anonymous and ELF backends, if the architecture has virtually indexed D-cache,
selectively flush cachelines belonging to the frame being freed.
This fixes Ticket #20.
 
2071 6499 d 23 h jermar /trunk/ (c) versus (C)  
2068 6507 d 6 h jermar /trunk/kernel/ Formatting and indentation fixes.  
2065 6513 d 21 h jermar /trunk/kernel/ Coding style fixes and formatting improvements.  
2054 6527 d 21 h jermar /trunk/kernel/ Fix important comment in kernel/arch/sparc64/src/proc/scheduler.c.

Improve framebuffer code.

Formatting and indentation fixes.
 
2048 6532 d 0 h jermar /trunk/ Formatting and indentation changes.  
2015 6538 d 23 h jermar /trunk/ Rework support for virtually indexed cache.
Instead of repeatedly flushing the data cache, which was a huge overkill, refuse to create an illegal address alias
in the kernel (again) and allocate appropriate page color in userspace instead. Extend the detection also to
SYS_PHYSMEM_MAP syscall.

Add support for tracking physical memory areas mappable by SYS_PHYSMEM_MAP.

Lots of coding style changes.
 
2009 6543 d 22 h jermar /trunk/kernel/ Initial support for handling illegal virtual aliases on sparc64.  
2008 6545 d 23 h jermar /trunk/kernel/arch/sparc64/ Add dcache_flush() function that flushes D-Cache on sparc64.  
2007 6546 d 21 h jermar /trunk/kernel/ Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.

There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out.
 
1978 6560 d 23 h jermar /trunk/ sparc64 code to support physical memory that starts on non-zero addresses.
Still needs to be tested on systems with such setup.
 
1954 6582 d 22 h jermar /trunk/ Minor changes. Some coding style fixes and also a type (tee vs. tree).
One AS -> as change.
 
1946 6589 d 20 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
- Improve panic screen on data_access_exception
by dumping contents of DSFSR and DSFAR.
- Change the FHC enable interrupt code to only
set the IMAP_V bit.
 
1891 6620 d 21 h jermar /trunk/kernel/ sparc64 work:
- Experimental support for TSB (Translation Storage Buffer).
 
1890 6621 d 7 h jermar /trunk/ - Create a dedicated slab cache for as_t objects and switch from malloc/free to slab_alloc/slab_free for
them.

- Slightly fix and improve both the kernel and userspace atomic_add() on sparc64.

- More TSB work on the sparc64 front.
 
1889 6621 d 23 h jermar /trunk/kernel/ Fix bug in mm/as.c:
- as_area_destroy() should not work with AS but as

sparc64 work:
- start implementing TSB support
 
1864 6635 d 20 h jermar /trunk/ sparc64 update.
- Prototype userspace layer implementation that
at least relates to sparc64 and compiles cleanly.
- Fixes for kernel's preemptible_handler and code
related to running userspace.
- Enable userspace. Several dozen instructions
are now run in userspace! We are pretty near
the userspace milestone for sparc64.
 
1860 6639 d 0 h jermar /trunk/kernel/ A lot of untested sparc64 stuff:
- Write ASID to hardware when a thread is about to run in userspace.
- Add userspace() and switch_to_userspace() functions.
- Handle special cases when the userspace spill/fill handler causes MMU trap.
- Resolve some TODOs in the existing sparc64 code.
- sparc64 has now C99 compliant header guards.
- Formatting and indentation fixes.
 
1857 6640 d 3 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
More bits needed to reach the userspace milestone were added.
The preemptible_handler(), still a prototype, now contains all functionality it needs.
Some sanitation was added to functions expecting page-aligned pointers to
userspace window buffer.
 
1851 6649 d 6 h jermar /trunk/kernel/ sparc64 work.
Define the istate structure.
Move the identity-mapping handler to assembly.
Make the preemptible handler more general so that TL=1 MMU exceptions can make use of it.

Little bit of formatting and indentation.
 
1849 6653 d 8 h jermar /trunk/kernel/ sparc64 work.
interrupt_vector trap experimental handling.
Minimal reverse-engineered FireHose Controller driver (documentation needed!).
Keyboard on Sun Enterprise is now interrupt driven. Keyboard on Sun Ultra
is still polled.
 
1823 6669 d 3 h jermar /trunk/kernel/arch/sparc64/ sparc64 work.
Dump take_over_tlb_and_tt() and add its assembly language replacement.
 
1822 6669 d 8 h jermar /trunk/ sparc64 work.
1. Formatting fixes.
2. When writing to DMMU ASI's, simple membar() can be used in place of flush().
3. Substantial changes in the way the TLB is taken over.
4. Remove unneeded functions.

This is the first revision that also runs on a real world Ultra 5 with UltraSPARC IIi
processor.

Note that 3. needs further work as the current implementation depends on the fact
that the compiler will use registers for local variables in take_over_tlb_and_tt().
Rewrite of that function into assembly is to follow.
 
1793 6687 d 8 h jermar /trunk/kernel/ Change hw_map() on sparc64 to use virtual addresses that are
beyond the end of physical memory. It is beneficial in two
ways: first, physical memory is no longer being wasted by
otherwise necessary calls to frame_alloc() and, second,
virtual addresses for devices are now correctly allocated
and do not overlap with the 4M TLB-locked mapping for
kernel text and data.
 
1792 6687 d 21 h jermar /trunk/ Move functionality of tlb_arch_init() to take_over_tlb_and_tt().
Call take_over_tlb_and_tt() very early after the kernel starts
executing.