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Rev Age Author Path Log message Diff
4668 5581 d 13 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4667)  
4537 5622 d 0 h trochtova /branches/dd/ dd branch synchronized with trunk (revision 4536)  
4055 5720 d 20 h trochtova /branches/dd/ changes in trunk (rev 4054) merged into dd branch  
3022 6003 d 23 h decky /branches/dd/ device drivers branch  
2726 6113 d 23 h vana /trunk/ Basic IA64 boot and kernel suport for real machines  
2725 6116 d 19 h decky /trunk/kernel/ remove config.memory_size, get_memory_size() and memory_init.{c|d}
the amount of available memory can be calculated from the sizes of the zones
add FRAMES2SIZE, SIZE2KB and SIZE2MB functions/macros (code readability)
 
2721 6117 d 20 h decky /trunk/kernel/ convert e820list to a generic physmem command  
2089 6490 d 20 h decky /trunk/ huge type system cleanup
remove cyclical type dependencies across multiple header files
many minor coding style fixes
 
2082 6496 d 20 h decky /trunk/ __asm__ __volatile__ -> asm volatile  
2071 6501 d 13 h jermar /trunk/ (c) versus (C)  
2007 6548 d 11 h jermar /trunk/kernel/ Introduce page colors. So far, only sparc64 uses correct page color bits. Other architectures have a dummy define
specifying zero bits for a page color.

There is a new check of page color in as_area_share(). Because of lack of support for this in the userspace, the
check has been #ifef'ed out.
 
1891 6622 d 11 h jermar /trunk/kernel/ sparc64 work:
- Experimental support for TSB (Translation Storage Buffer).
 
1890 6622 d 22 h jermar /trunk/ - Create a dedicated slab cache for as_t objects and switch from malloc/free to slab_alloc/slab_free for
them.

- Slightly fix and improve both the kernel and userspace atomic_add() on sparc64.

- More TSB work on the sparc64 front.
 
1889 6623 d 13 h jermar /trunk/kernel/ Fix bug in mm/as.c:
- as_area_destroy() should not work with AS but as

sparc64 work:
- start implementing TSB support
 
1888 6626 d 16 h jermar /trunk/ C99 compliant header guards (hopefully) everywhere in the kernel.
Formatting and indentation changes.
Small improvements in sparc64.
 
1787 6691 d 15 h decky / move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot  
1780 6698 d 16 h jermar /kernel/trunk/ Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).  
1702 6719 d 19 h cejka /kernel/trunk/ Kernel doxygen comments updated.  
1675 6723 d 21 h jermar /kernel/trunk/arch/ia64/ On ia64, purge DTR entry before overwriting it with new contents.  
1511 6730 d 19 h palkovsky /kernel/trunk/arch/ Remove __address from include file included by uspace  
1290 6758 d 20 h vana /kernel/trunk/arch/ VESA detection failure fix.

(Some headers)
 
1210 6772 d 21 h vana /kernel/trunk/ Incomplete VHPT walker support for Itanium  
1138 6797 d 17 h jermar /kernel/trunk/ CPU stacks must have two frames on ia64.
Make sure both thread stack frames are mapped in before_thread_runs_arch().
Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp().
 
1108 6802 d 11 h jermar /kernel/trunk/ Small PTE_* macros and SET_PTL0_ADDRESS macro changes.  
1070 6807 d 23 h jermar /kernel/trunk/ More checks for address space area conflicts.  
967 6810 d 23 h palkovsky /kernel/trunk/ Allowed userspace to include page.h.  
958 6811 d 13 h jermar /kernel/trunk/ Nicer ia32 interrupt handlers and structures holding interrupted context data.
Unify the name holding interrupted context data on all architectures to be istate.
 
945 6812 d 12 h vana /kernel/trunk/arch/ia64/  
944 6812 d 13 h vana /kernel/trunk/ Itanium tlb_invalidate_pages  
940 6812 d 15 h jermar /kernel/trunk/ Get rid of unneeded macros.
Their functionality has been replaced by the ELF loader.
 
935 6812 d 16 h vana /kernel/trunk/ Two frame stack (standard stack + RSE) on Itanium  
919 6815 d 21 h jermar /kernel/trunk/ ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.
 
915 6817 d 23 h jermar /kernel/trunk/arch/ia64/ ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.
 
911 6819 d 17 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)
 
903 6822 d 16 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Add code needed for running multiple address spaces and location of kernel stack
after switch from userspace.
 
902 6823 d 21 h jermar /kernel/trunk/ ia64 work.
More capable TLB miss handlers.
The ia64 kernel now passes mm/mapping1 test.

Fix generic hash table to properly initialize lists.

Change page_ht() to properly initialize inserted PTE's.
Change format of generic page hash table PTE's.
 
901 6823 d 22 h jermar /kernel/trunk/arch/ ia64 work.
Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler.
Add before_thread_runs_arch() that maps kstack, if necessary.
Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.
 
900 6824 d 16 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Proper TLB fault handlers' headers and prototypes.
PFN 0 needs no longer be marked unavailable to frame allocator.
 
899 6824 d 17 h jermar /kernel/trunk/arch/ ia64 work.
Add dummy TLB fault handlers.
Improve code reuse in arch/mm/tlb.c.
 
879 6827 d 14 h vana /kernel/trunk/arch/ia64/ Itanium kernel page extended to maximum (256M) repaired RR manipulation functions, paging setuping function and added some comments.