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1138 6869 d 20 h jermar /kernel/trunk/ CPU stacks must have two frames on ia64.
Make sure both thread stack frames are mapped in before_thread_runs_arch().
Take STACK_FRAMES into account during kernel memory layout initialization in main_bsp().		  
1056 6880 d 19 h jermar /kernel/trunk/arch/ia64/src/ Slightly optimized version of ivt.S.  
1053 6880 d 20 h vana /kernel/trunk/ Itanium FPU Lazy context switching... but not so much tested  
1023 6881 d 18 h vana /kernel/trunk/ Itanium FPU active context switch  
993 6882 d 17 h jermar /kernel/trunk/arch/ia64/ Fix bug in switch to userspace on ia64: ensure start in bank 1.
Fix bug in tlb_invalidate_all() that cause interrupts to be unconditionally enabled.
Optimize context switching by discarding packed attribute of context structures.		  
979 6882 d 23 h vana /kernel/trunk/arch/ia64/ Itanium FPU context save/restore  
962 6883 d 15 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Support for __SYSCALL4.
Fix user stack initial address.		  
921 6887 d 19 h jermar /kernel/trunk/arch/ia64/ ia64 work.
Userspace is now working.
There is an unrelated show stopper, however.		  
919 6888 d 0 h jermar /kernel/trunk/ ia64 work.
Changes to make userspace work (kernel part).
Use ski.conf from contrib directory to run Ski.

There is actually no appropriate syscall handler yet.		  
916 6890 d 2 h jermar /kernel/trunk/arch/ia64/src/ ia64 work.
Support switch from userspace register stack in heavyweight handler.		  
915 6890 d 3 h jermar /kernel/trunk/arch/ia64/ ia64 work.
- Another item had to be allocated on stack to remember new value written to ar.bspstore.
Fix heavyweight interruption handler to calculate RSC.loadrs from the new value of ar.bspstore
instead from the old one.
Uncomment instructions switching ar.bspstore.
- Configure kernel with 512M of memory.		  
912 6891 d 16 h jermar /kernel/trunk/ ia64 work.

ivt.S:
Detect userspace stack in heavyweight handler and switch to kernel stack.
Remember the old stack pointer.
As for register stack, kernel stack is assumed still.
Fix alignment issues that showed when STACK_ITEMS was odd.
Fix ld8 instruction that did subtraction of 8 instead of addition of 8.

scheduler.c:
Change before_thread_runs_arch() to calculate address of top of the stack
for the interrupt handler.		  
911 6891 d 20 h jermar /kernel/trunk/arch/ia64/ ia64 work.

Change heavyweight interrupt handler to use bank 0 registers instead of AR.KR0 and AR.KR1.
This prevents userspace from the possibility to see what addresses are being used by kernel.

Store kernel stack address in bank 0 r23 instead of AR.KR7. Again, userspace will not be
able to read the address of its kernel stack.

Increase FRAME_SIZE to 64K as this is the first supported page size in which will fit
thread's combined register and memory stack. (RSE can write out as many as 16K.)		  
899 6896 d 20 h jermar /kernel/trunk/arch/ ia64 work.
Add dummy TLB fault handlers.
Improve code reuse in arch/mm/tlb.c.		  
534 6982 d 17 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel again.  
532 6982 d 17 h jermar / Revert renaming of HelenOS/SPARTAN to HelenOS/kernel because of important pending patch.  
501 6994 d 22 h jermar / Rename HelenOS/SPARTAN to HelenOS/kernel.  
478 7005 d 20 h jermar /SPARTAN/trunk/ Re-aply mistakenly reverted changes.  
477 7005 d 23 h vana /SPARTAN/trunk/ Atomic inc & dec functions synchronized on all ia32,ia64 and mips platforms. Now there are 3 versions which returns no value, new value and old value och changed variable.  
473 7007 d 14 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Comment some offending steps of heavyweight interrupt handler regarding RSE switching.
With this change, ia64 will do well on tests rwlock #4 and thread #1.
Cleanup.		  
472 7007 d 22 h jermar /SPARTAN/trunk/ Changes in build system.
For .S targets, always do -D__ASM__.
Remove unnecessary #define __ASM__ from various *.S files.
At the end of build, generate disassembler dump for kernel.raw.

ia64 work.
Better General Exception handler.		  
470 7008 d 11 h jermar /SPARTAN/trunk/ ia64 work.
Big cleanup of IA-64 interrupt processing.
Merge of interrupt.c and interrupt_handler.c.
Rewrite of ivt.S and interrupt.c.
Higher level interrupt handlers are now passed a vector number and a pointer to stack structure.

ia32 work.
ia32 has ordered writes. Until it deploys weaker memory ordering model, write_barrier() can be empty statement.		  
456 7009 d 1 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Add missing srlz_d().
Remove extra stops.
Coding style cleanups.		  
445 7009 d 21 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Fix SP_DELTA alignment.
Cosmetics.		  
444 7009 d 22 h vana /SPARTAN/trunk/arch/ia64/ Context restore in HEAVYWEIGHT handlers  
443 7009 d 23 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Do not break memory stack alignment in heavyweight interrupt handler.
Reserve scratch area for nested procedure calls on memory stack.		  
442 7010 d 0 h vana /SPARTAN/trunk/arch/ia64/src/ sp should not be decremented after last save  
441 7010 d 0 h jermar /SPARTAN/trunk/arch/ia64/src/ r12 (stack pointer) must be descremented prior to storing data into new memory stack frame.  
439 7010 d 20 h jermar /SPARTAN/trunk/arch/ia64/src/ Two small ia64 improvements.  
438 7010 d 21 h jermar /SPARTAN/trunk/arch/ia64/src/ ia64 work.
Heavyweight handler should be complete up to the point where it switches back to interrupted RSE context.		  
435 7011 d 16 h jermar /SPARTAN/trunk/arch/ia64/ ia64 work.
Begin implemention of heavyweight interrupt handler.
Finish implementation of interval timer.
Add some PAL macros.		  
431 7014 d 1 h jermar /SPARTAN/trunk/arch/ IA-64 work.
Exclude external interrupt from universal_handler() scope.		  
238 7076 d 19 h vana /SPARTAN/trunk/ Register dump on IA-64 exceptions  
220 7077 d 4 h vana /SPARTAN/trunk/ Universal exception handler and all exceptions routine to call it added  
212 7077 d 15 h vana /SPARTAN/trunk/ Basic exception support added for ia64 arch ......