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(root)//branches/dd/kernel/arch/ia64/src/mm/page.c – Rev 4537

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Rev	Age	Author	Path	Log message
4537	6173 d 23 h	trochtova	/branches/dd/	dd branch synchronized with trunk (revision 4536)
4055	6272 d 20 h	trochtova	/branches/dd/	changes in trunk (rev 4054) merged into dd branch
3022	6555 d 22 h	decky	/branches/dd/	device drivers branch
2089	7042 d 20 h	decky	/trunk/	huge type system cleanup remove cyclical type dependencies across multiple header files many minor coding style fixes
2071	7053 d 13 h	jermar	/trunk/	(c) versus (C)
1888	7178 d 16 h	jermar	/trunk/	C99 compliant header guards (hopefully) everywhere in the kernel. Formatting and indentation changes. Small improvements in sparc64.
1787	7243 d 15 h	decky	/	move kernel/trunk, uspace/trunk and boot/trunk to trunk/kernel, trunk/uspace and trunk/boot
1780	7250 d 16 h	jermar	/kernel/trunk/	Replace old __u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).
1708	7268 d 22 h	jermar	/kernel/trunk/	Fix some broken doxygen comments.
1702	7271 d 19 h	cejka	/kernel/trunk/	Kernel doxygen comments updated.
1210	7324 d 20 h	vana	/kernel/trunk/	Incomplete VHPT walker support for Itanium
904	7374 d 14 h	jermar	/kernel/trunk/arch/ia64/src/mm/	ia64 fix in page.c == (comparison) was used istead of = (assignment).
902	7375 d 20 h	jermar	/kernel/trunk/	ia64 work. More capable TLB miss handlers. The ia64 kernel now passes mm/mapping1 test. Fix generic hash table to properly initialize lists. Change page_ht() to properly initialize inserted PTE's. Change format of generic page hash table PTE's.
901	7375 d 22 h	jermar	/kernel/trunk/arch/	ia64 work. Provide PA2KA(identity) mapping for kernel data references via Alternate Data TLB Fault handler. Add before_thread_runs_arch() that maps kstack, if necessary. Add easy to use dtlb_mapping_insert() for comfortable insertion of kernel data mappings.
879	7379 d 14 h	vana	/kernel/trunk/arch/ia64/	Itanium kernel page extended to maximum (256M) repaired RR manipulation functions, paging setuping function and added some comments.
869	7382 d 9 h	vana	/kernel/trunk/	Uaaaaaaa ;-) Itanium Paging !!!!!! ;-)
793	7398 d 18 h	jermar	/kernel/trunk/	Use hash_table_get_instance instead of list_get_instance. Rename page_operations to page_mapping_operations. Rename page_pt_operations to pt_mapping_operations. Rename page_ht_operations to ht_mapping_operations.
792	7398 d 19 h	jermar	/kernel/trunk/	Page hash table architectures now use generic hash table to manage mappings.
786	7399 d 17 h	bondari	/kernel/trunk/	frame_alloc() functions variations in order to avoid problems with frame_alloc_generic() changes. IMPORTANT: Parameter order for frame_alloc() was changed
762	7402 d 19 h	palkovsky	/kernel/trunk/	Currently not-working SLAB allocator. - slightly changed interface to frame_alloc, allow zone preference
751	7405 d 19 h	jermar	/kernel/trunk/arch/ia64/	Fix initialization of pta.base on ia64.
749	7407 d 16 h	jermar	/kernel/trunk/arch/ia64/	ia64 virtual address translation subsystem update.
748	7408 d 17 h	jermar	/kernel/trunk/arch/ia64/	First HT_HASH_ARCH implementation for ia64.
747	7409 d 10 h	jermar	/kernel/trunk/	ia64 work. Add nice wrappers for thash and ttag instructions. Add nice wrappers for accessing reion registers and PTA. Fix set_vhpt_environment(). Allocate and initialize page_ht (a.k.a. VHPT). Add missing header to sparc64. Remove excessive header from debug.h.
746	7409 d 19 h	jermar	/kernel/trunk/	Page hash table modifications.
728	7416 d 10 h	vana	/kernel/trunk/arch/ia64/src/mm/	Serialize writes to RR because of assembler RAW warning.
726	7416 d 11 h	jermar	/kernel/trunk/arch/ia64/src/mm/	Temporarily disable set_VHPT_environment() to stop ia64 kernel from faulting.
716	7420 d 15 h	vana	/kernel/trunk/arch/ia64/src/mm/	ttag and thash envelope functions
715	7420 d 15 h	vana	/kernel/trunk/arch/ia64/	VHPT setup to be able to use ttag and thash instructions
684	7427 d 18 h	jermar	/kernel/trunk/	Memory management work. Move generic 4-level page table interface to genarch and enable architectures to use different virtual memory mechanisms (e.g. page hash tables). Start page hash table support. Switch ia64 and sparc64 to page hash tables. Other architectures keep on using 4-level page table interface.