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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __amd64_ATOMIC_H__
  30. #define __amd64_ATOMIC_H__
  31.  
  32. static inline void atomic_inc(atomic_t *val) {
  33.     __asm__ volatile ("lock incq %0\n" : "=m" (val->count));
  34. }
  35.  
  36. static inline void atomic_dec(atomic_t *val) {
  37.     __asm__ volatile ("lock decq %0\n" : "=m" (val->count));
  38. }
  39.  
  40. static inline long atomic_postinc(atomic_t *val)
  41. {
  42.     long r;
  43.  
  44.     __asm__ volatile (
  45.         "movq $1, %0\n"
  46.         "lock xaddq %0, %1\n"
  47.         : "=r" (r), "=m" (val->count)
  48.     );
  49.  
  50.     return r;
  51. }
  52.  
  53. static inline long atomic_postdec(atomic_t *val)
  54. {
  55.     long r;
  56.    
  57.     __asm__ volatile (
  58.         "movq $-1, %0\n"
  59.         "lock xaddq %0, %1\n"
  60.         : "=r" (r), "=m" (val->count)
  61.     );
  62.    
  63.     return r;
  64. }
  65.  
  66. #define atomic_preinc(val) (atomic_postinc(val)+1)
  67. #define atomic_predec(val) (atomic_postdec(val)-1)
  68.  
  69. #endif
  70.