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  1. /*
  2.  * Copyright (C) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64mm  
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #ifndef KERN_sparc64_TSB_H_
  36. #define KERN_sparc64_TSB_H_
  37.  
  38. /*
  39.  * ITSB abd DTSB will claim 64K of memory, which
  40.  * is a nice number considered that it is one of
  41.  * the page sizes supported by hardware, which,
  42.  * again, is nice because TSBs need to be locked
  43.  * in TLBs - only one TLB entry will do.
  44.  */
  45. #define TSB_SIZE            2   /* when changing this, change as.c as well */
  46. #define ITSB_ENTRY_COUNT        (512*(1<<TSB_SIZE))
  47. #define DTSB_ENTRY_COUNT        (512*(1<<TSB_SIZE))
  48.  
  49. #define TSB_TAG_TARGET_CONTEXT_SHIFT    48
  50.  
  51. #ifndef __ASM__
  52.  
  53. #include <arch/mm/tte.h>
  54. #include <arch/mm/mmu.h>
  55. #include <arch/types.h>
  56. #include <typedefs.h>
  57.  
  58. /** TSB Tag Target register. */
  59. union tsb_tag_target {
  60.     uint64_t value;
  61.     struct {
  62.         unsigned invalid : 1;   /**< Invalidated by software. */
  63.         unsigned : 2;
  64.         unsigned context : 13;  /**< Software ASID. */
  65.         unsigned : 6;
  66.         uint64_t va_tag : 42;   /**< Virtual address bits <63:22>. */
  67.     } __attribute__ ((packed));
  68. };
  69. typedef union tsb_tag_target tsb_tag_target_t;
  70.  
  71. /** TSB entry. */
  72. struct tsb_entry {
  73.     tsb_tag_target_t tag;
  74.     tte_data_t data;
  75. } __attribute__ ((packed));
  76. typedef struct tsb_entry tsb_entry_t;
  77.  
  78. /** TSB Base register. */
  79. union tsb_base_reg {
  80.     uint64_t value;
  81.     struct {
  82.         uint64_t base : 51; /**< TSB base address, bits 63:13. */
  83.         unsigned split : 1; /**< Split vs. common TSB for 8K and 64K pages.
  84.                       *  HelenOS uses only 8K pages for user mappings,
  85.                       *  so we always set this to 0.
  86.                       */
  87.         unsigned : 9;
  88.         unsigned size : 3;  /**< TSB size. Number of entries is 512*2^size. */
  89.     } __attribute__ ((packed));
  90. };
  91. typedef union tsb_base_reg tsb_base_reg_t;
  92.  
  93. /** Read ITSB Base register.
  94.  *
  95.  * @return Content of the ITSB Base register.
  96.  */
  97. static inline uint64_t itsb_base_read(void)
  98. {
  99.     return asi_u64_read(ASI_IMMU, VA_IMMU_TSB_BASE);
  100. }
  101.  
  102. /** Read DTSB Base register.
  103.  *
  104.  * @return Content of the DTSB Base register.
  105.  */
  106. static inline uint64_t dtsb_base_read(void)
  107. {
  108.     return asi_u64_read(ASI_DMMU, VA_DMMU_TSB_BASE);
  109. }
  110.  
  111. /** Write ITSB Base register.
  112.  *
  113.  * @param v New content of the ITSB Base register.
  114.  */
  115. static inline void itsb_base_write(uint64_t v)
  116. {
  117.     asi_u64_write(ASI_IMMU, VA_IMMU_TSB_BASE, v);
  118. }
  119.  
  120. /** Write DTSB Base register.
  121.  *
  122.  * @param v New content of the DTSB Base register.
  123.  */
  124. static inline void dtsb_base_write(uint64_t v)
  125. {
  126.     asi_u64_write(ASI_DMMU, VA_DMMU_TSB_BASE, v);
  127. }
  128.  
  129. extern void tsb_invalidate(as_t *as, uintptr_t page, count_t pages);
  130. extern void itsb_pte_copy(pte_t *t);
  131. extern void dtsb_pte_copy(pte_t *t, bool ro);
  132.  
  133. #endif /* !def __ASM__ */
  134.  
  135. #endif
  136.  
  137. /** @}
  138.  */
  139.