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  1. /*
  2.  * Copyright (c) 2006 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ppc32mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <mm/tlb.h>
  36. #include <arch/mm/tlb.h>
  37. #include <arch/interrupt.h>
  38. #include <interrupt.h>
  39. #include <mm/as.h>
  40. #include <arch.h>
  41. #include <print.h>
  42. #include <symtab.h>
  43.  
  44.  
  45. static unsigned int seed = 10;
  46. static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42;
  47.  
  48.  
  49. /** Try to find PTE for faulting address
  50.  *
  51.  * Try to find PTE for faulting address.
  52.  * The as->lock must be held on entry to this function
  53.  * if lock is true.
  54.  *
  55.  * @param as        Address space.
  56.  * @param lock      Lock/unlock the address space.
  57.  * @param badvaddr  Faulting virtual address.
  58.  * @param access    Access mode that caused the fault.
  59.  * @param istate    Pointer to interrupted state.
  60.  * @param pfrc      Pointer to variable where as_page_fault() return code
  61.  *          will be stored.
  62.  * @return      PTE on success, NULL otherwise.
  63.  *
  64.  */
  65. static pte_t *
  66. find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access,
  67.     istate_t *istate, int *pfrc)
  68. {
  69.     /*
  70.      * Check if the mapping exists in page tables.
  71.      */
  72.     pte_t *pte = page_mapping_find(as, badvaddr);
  73.     if ((pte) && (pte->present)) {
  74.         /*
  75.          * Mapping found in page tables.
  76.          * Immediately succeed.
  77.          */
  78.         return pte;
  79.     } else {
  80.         int rc;
  81.    
  82.         /*
  83.          * Mapping not found in page tables.
  84.          * Resort to higher-level page fault handler.
  85.          */
  86.         page_table_unlock(as, lock);
  87.         switch (rc = as_page_fault(badvaddr, access, istate)) {
  88.         case AS_PF_OK:
  89.             /*
  90.              * The higher-level page fault handler succeeded,
  91.              * The mapping ought to be in place.
  92.              */
  93.             page_table_lock(as, lock);
  94.             pte = page_mapping_find(as, badvaddr);
  95.             ASSERT((pte) && (pte->present));
  96.             *pfrc = 0;
  97.             return pte;
  98.         case AS_PF_DEFER:
  99.             page_table_lock(as, lock);
  100.             *pfrc = rc;
  101.             return NULL;
  102.         case AS_PF_FAULT:
  103.             page_table_lock(as, lock);
  104.             *pfrc = rc;
  105.             return NULL;
  106.         default:
  107.             panic("Unexpected rc (%d).", rc);
  108.         }  
  109.     }
  110. }
  111.  
  112.  
  113. static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
  114. {
  115.     char *symbol = "";
  116.     char *sym2 = "";
  117.  
  118.     char *str = get_symtab_entry(istate->pc);
  119.     if (str)
  120.         symbol = str;
  121.     str = get_symtab_entry(istate->lr);
  122.     if (str)
  123.         sym2 = str;
  124.  
  125.     fault_if_from_uspace(istate,
  126.         "PHT Refill Exception on %p.", badvaddr);
  127.     panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
  128.         istate->pc, symbol, sym2);
  129. }
  130.  
  131.  
  132. /** Pseudorandom generator
  133.  *
  134.  * A pretty standard linear congruential pseudorandom
  135.  * number generator (m = 2^32).
  136.  *
  137.  */
  138. #define RANDI(seed) \
  139.     ({ \
  140.         (seed) = 1103515245 * (seed) + 12345; \
  141.         (seed); \
  142.     })
  143.  
  144.  
  145. static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
  146. {
  147.     uint32_t page = (vaddr >> 12) & 0xffff;
  148.     uint32_t api = (vaddr >> 22) & 0x3f;
  149.    
  150.     uint32_t vsid;
  151.     asm volatile (
  152.         "mfsrin %0, %1\n"
  153.         : "=r" (vsid)
  154.         : "r" (vaddr)
  155.     );
  156.    
  157.     uint32_t sdr1;
  158.     asm volatile (
  159.         "mfsdr1 %0\n"
  160.         : "=r" (sdr1)
  161.     );
  162.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  163.    
  164.     /* Primary hash (xor) */
  165.     uint32_t h = 0;
  166.     uint32_t hash = vsid ^ page;
  167.     uint32_t base = (hash & 0x3ff) << 3;
  168.     uint32_t i;
  169.     bool found = false;
  170.    
  171.     /* Find unused or colliding PTE in PTEG */
  172.     for (i = 0; i < 8; i++) {
  173.         if ((!phte[base + i].v) ||
  174.             ((phte[base + i].vsid == vsid)
  175.             && (phte[base + i].api == api)
  176.             && (phte[base + i].h == 0))) {
  177.             found = true;
  178.             break;
  179.         }
  180.     }
  181.    
  182.     if (!found) {
  183.         /* Secondary hash (not) */
  184.         uint32_t base2 = (~hash & 0x3ff) << 3;
  185.        
  186.         /* Find unused or colliding PTE in PTEG */
  187.         for (i = 0; i < 8; i++) {
  188.             if ((!phte[base2 + i].v) ||
  189.                 ((phte[base2 + i].vsid == vsid)
  190.                 && (phte[base2 + i].api == api)
  191.                 && (phte[base2 + i].h == 1))) {
  192.                 found = true;
  193.                 base = base2;
  194.                 h = 1;
  195.                 break;
  196.             }
  197.         }
  198.        
  199.         if (!found)
  200.             i = RANDI(seed) % 8;
  201.     }
  202.    
  203.     phte[base + i].v = 1;
  204.     phte[base + i].vsid = vsid;
  205.     phte[base + i].h = h;
  206.     phte[base + i].api = api;
  207.     phte[base + i].rpn = pte->pfn;
  208.     phte[base + i].r = 0;
  209.     phte[base + i].c = 0;
  210.     phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
  211.     phte[base + i].pp = 2; // FIXME
  212. }
  213.  
  214.  
  215. /** Process Instruction/Data Storage Interrupt
  216.  *
  217.  * @param n     Interrupt vector number.
  218.  * @param istate    Interrupted register context.
  219.  *
  220.  */
  221. void pht_refill(int n, istate_t *istate)
  222. {
  223.     uintptr_t badvaddr;
  224.     pte_t *pte;
  225.     int pfrc;
  226.     as_t *as;
  227.     bool lock;
  228.    
  229.     if (AS == NULL) {
  230.         as = AS_KERNEL;
  231.         lock = false;
  232.     } else {
  233.         as = AS;
  234.         lock = true;
  235.     }
  236.    
  237.     if (n == VECTOR_DATA_STORAGE)
  238.         badvaddr = istate->dar;
  239.     else
  240.         badvaddr = istate->pc;
  241.        
  242.     page_table_lock(as, lock);
  243.    
  244.     pte = find_mapping_and_check(as, lock, badvaddr,
  245.         PF_ACCESS_READ /* FIXME */, istate, &pfrc);
  246.     if (!pte) {
  247.         switch (pfrc) {
  248.         case AS_PF_FAULT:
  249.             goto fail;
  250.             break;
  251.         case AS_PF_DEFER:
  252.             /*
  253.              * The page fault came during copy_from_uspace()
  254.              * or copy_to_uspace().
  255.              */
  256.             page_table_unlock(as, lock);
  257.             return;
  258.         default:
  259.             panic("Unexpected pfrc (%d).", pfrc);
  260.         }
  261.     }
  262.    
  263.     pte->accessed = 1; /* Record access to PTE */
  264.     pht_insert(badvaddr, pte);
  265.    
  266.     page_table_unlock(as, lock);
  267.     return;
  268.    
  269. fail:
  270.     page_table_unlock(as, lock);
  271.     pht_refill_fail(badvaddr, istate);
  272. }
  273.  
  274.  
  275. /** Process Instruction/Data Storage Interrupt in Real Mode
  276.  *
  277.  * @param n     Interrupt vector number.
  278.  * @param istate    Interrupted register context.
  279.  *
  280.  */
  281. bool pht_refill_real(int n, istate_t *istate)
  282. {
  283.     uintptr_t badvaddr;
  284.    
  285.     if (n == VECTOR_DATA_STORAGE)
  286.         badvaddr = istate->dar;
  287.     else
  288.         badvaddr = istate->pc;
  289.    
  290.     uint32_t physmem;
  291.     asm volatile (
  292.         "mfsprg3 %0\n"
  293.         : "=r" (physmem)
  294.     );
  295.    
  296.     if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem)))
  297.         return false;
  298.    
  299.     uint32_t page = (badvaddr >> 12) & 0xffff;
  300.     uint32_t api = (badvaddr >> 22) & 0x3f;
  301.    
  302.     uint32_t vsid;
  303.     asm volatile (
  304.         "mfsrin %0, %1\n"
  305.         : "=r" (vsid)
  306.         : "r" (badvaddr)
  307.     );
  308.    
  309.     uint32_t sdr1;
  310.     asm volatile (
  311.         "mfsdr1 %0\n"
  312.         : "=r" (sdr1)
  313.     );
  314.     phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000);
  315.    
  316.     /* Primary hash (xor) */
  317.     uint32_t h = 0;
  318.     uint32_t hash = vsid ^ page;
  319.     uint32_t base = (hash & 0x3ff) << 3;
  320.     uint32_t i;
  321.     bool found = false;
  322.    
  323.     /* Find unused or colliding PTE in PTEG */
  324.     for (i = 0; i < 8; i++) {
  325.         if ((!phte_real[base + i].v) ||
  326.             ((phte_real[base + i].vsid == vsid)
  327.             && (phte_real[base + i].api == api)
  328.             && (phte_real[base + i].h == 0))) {
  329.             found = true;
  330.             break;
  331.         }
  332.     }
  333.    
  334.     if (!found) {
  335.         /* Secondary hash (not) */
  336.         uint32_t base2 = (~hash & 0x3ff) << 3;
  337.        
  338.         /* Find unused or colliding PTE in PTEG */
  339.         for (i = 0; i < 8; i++) {
  340.             if ((!phte_real[base2 + i].v) ||
  341.                 ((phte_real[base2 + i].vsid == vsid)
  342.                 && (phte_real[base2 + i].api == api)
  343.                 && (phte_real[base2 + i].h == 1))) {
  344.                 found = true;
  345.                 base = base2;
  346.                 h = 1;
  347.                 break;
  348.             }
  349.         }
  350.        
  351.         if (!found) {
  352.             /* Use secondary hash to avoid collisions
  353.                with usual PHT refill handler. */
  354.             i = RANDI(seed_real) % 8;
  355.             base = base2;
  356.             h = 1;
  357.         }
  358.     }
  359.    
  360.     phte_real[base + i].v = 1;
  361.     phte_real[base + i].vsid = vsid;
  362.     phte_real[base + i].h = h;
  363.     phte_real[base + i].api = api;
  364.     phte_real[base + i].rpn = KA2PA(badvaddr) >> 12;
  365.     phte_real[base + i].r = 0;
  366.     phte_real[base + i].c = 0;
  367.     phte_real[base + i].wimg = 0;
  368.     phte_real[base + i].pp = 2; // FIXME
  369.    
  370.     return true;
  371. }
  372.  
  373.  
  374. void tlb_arch_init(void)
  375. {
  376.     tlb_invalidate_all();
  377. }
  378.  
  379.  
  380. void tlb_invalidate_all(void)
  381. {
  382.     asm volatile (
  383.         "tlbsync\n"
  384.     );
  385. }
  386.  
  387.  
  388. void tlb_invalidate_asid(asid_t asid)
  389. {
  390.     uint32_t sdr1;
  391.     asm volatile (
  392.         "mfsdr1 %0\n"
  393.         : "=r" (sdr1)
  394.     );
  395.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  396.    
  397.     uint32_t i;
  398.     for (i = 0; i < 8192; i++) {
  399.         if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) &&
  400.             (phte[i].vsid < ((asid << 4) + 16)))
  401.             phte[i].v = 0;
  402.     }
  403.     tlb_invalidate_all();
  404. }
  405.  
  406.  
  407. void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
  408. {
  409.     // TODO
  410.     tlb_invalidate_all();
  411. }
  412.  
  413.  
  414. #define PRINT_BAT(name, ureg, lreg) \
  415.     asm volatile ( \
  416.         "mfspr %0," #ureg "\n" \
  417.         "mfspr %1," #lreg "\n" \
  418.         : "=r" (upper), "=r" (lower) \
  419.     ); \
  420.     mask = (upper & 0x1ffc) >> 2; \
  421.     if (upper & 3) { \
  422.         uint32_t tmp = mask; \
  423.         length = 128; \
  424.         while (tmp) { \
  425.             if ((tmp & 1) == 0) { \
  426.                 printf("ibat[0]: error in mask\n"); \
  427.                 break; \
  428.             } \
  429.             length <<= 1; \
  430.             tmp >>= 1; \
  431.         } \
  432.     } else \
  433.         length = 0; \
  434.     printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \
  435.         sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \
  436.         lower & 0xffff0000, length, mask, \
  437.         ((upper >> 1) & 1) ? " supervisor" : "", \
  438.         (upper & 1) ? " user" : "");
  439.  
  440.  
  441. void tlb_print(void)
  442. {
  443.     uint32_t sr;
  444.    
  445.     for (sr = 0; sr < 16; sr++) {
  446.         uint32_t vsid;
  447.         asm volatile (
  448.             "mfsrin %0, %1\n"
  449.             : "=r" (vsid)
  450.             : "r" (sr << 28)
  451.         );
  452.         printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr,
  453.             sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
  454.             ((vsid >> 30) & 1) ? " supervisor" : "",
  455.             ((vsid >> 29) & 1) ? " user" : "");
  456.     }
  457.    
  458.     uint32_t upper;
  459.     uint32_t lower;
  460.     uint32_t mask;
  461.     uint32_t length;
  462.    
  463.     PRINT_BAT("ibat[0]", 528, 529);
  464.     PRINT_BAT("ibat[1]", 530, 531);
  465.     PRINT_BAT("ibat[2]", 532, 533);
  466.     PRINT_BAT("ibat[3]", 534, 535);
  467.    
  468.     PRINT_BAT("dbat[0]", 536, 537);
  469.     PRINT_BAT("dbat[1]", 538, 539);
  470.     PRINT_BAT("dbat[2]", 540, 541);
  471.     PRINT_BAT("dbat[3]", 542, 543);
  472. }
  473.  
  474. /** @}
  475.  */
  476.