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  1. /*
  2.  * Copyright (c) 2006 Martin Decky
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ppc32mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <mm/tlb.h>
  36. #include <arch/mm/tlb.h>
  37. #include <arch/interrupt.h>
  38. #include <interrupt.h>
  39. #include <mm/as.h>
  40. #include <arch.h>
  41. #include <print.h>
  42. #include <symtab.h>
  43.  
  44.  
  45. /** Try to find PTE for faulting address
  46.  *
  47.  * Try to find PTE for faulting address.
  48.  * The as->lock must be held on entry to this function
  49.  * if lock is true.
  50.  *
  51.  * @param as        Address space.
  52.  * @param lock      Lock/unlock the address space.
  53.  * @param badvaddr  Faulting virtual address.
  54.  * @param access    Access mode that caused the fault.
  55.  * @param istate    Pointer to interrupted state.
  56.  * @param pfrc      Pointer to variable where as_page_fault() return code
  57.  *          will be stored.
  58.  * @return      PTE on success, NULL otherwise.
  59.  *
  60.  */
  61. static pte_t *
  62. find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access,
  63.     istate_t *istate, int *pfrc)
  64. {
  65.     /*
  66.      * Check if the mapping exists in page tables.
  67.      */
  68.     pte_t *pte = page_mapping_find(as, badvaddr);
  69.     if ((pte) && (pte->present)) {
  70.         /*
  71.          * Mapping found in page tables.
  72.          * Immediately succeed.
  73.          */
  74.         return pte;
  75.     } else {
  76.         int rc;
  77.    
  78.         /*
  79.          * Mapping not found in page tables.
  80.          * Resort to higher-level page fault handler.
  81.          */
  82.         page_table_unlock(as, lock);
  83.         switch (rc = as_page_fault(badvaddr, access, istate)) {
  84.         case AS_PF_OK:
  85.             /*
  86.              * The higher-level page fault handler succeeded,
  87.              * The mapping ought to be in place.
  88.              */
  89.             page_table_lock(as, lock);
  90.             pte = page_mapping_find(as, badvaddr);
  91.             ASSERT((pte) && (pte->present));
  92.             *pfrc = 0;
  93.             return pte;
  94.         case AS_PF_DEFER:
  95.             page_table_lock(as, lock);
  96.             *pfrc = rc;
  97.             return NULL;
  98.         case AS_PF_FAULT:
  99.             page_table_lock(as, lock);
  100.             *pfrc = rc;
  101.             return NULL;
  102.         default:
  103.             panic("Unexpected rc (%d).", rc);
  104.         }  
  105.     }
  106. }
  107.  
  108.  
  109. static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
  110. {
  111.     char *symbol = "";
  112.     char *sym2 = "";
  113.  
  114.     char *str = get_symtab_entry(istate->pc);
  115.     if (str)
  116.         symbol = str;
  117.     str = get_symtab_entry(istate->lr);
  118.     if (str)
  119.         sym2 = str;
  120.  
  121.     fault_if_from_uspace(istate,
  122.         "PHT Refill Exception on %p.", badvaddr);
  123.     panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr,
  124.         istate->pc, symbol, sym2);
  125. }
  126.  
  127.  
  128. static void pht_insert(const uintptr_t vaddr, const pte_t *pte)
  129. {
  130.     uint32_t page = (vaddr >> 12) & 0xffff;
  131.     uint32_t api = (vaddr >> 22) & 0x3f;
  132.    
  133.     uint32_t vsid;
  134.     asm volatile (
  135.         "mfsrin %0, %1\n"
  136.         : "=r" (vsid)
  137.         : "r" (vaddr)
  138.     );
  139.    
  140.     uint32_t sdr1;
  141.     asm volatile (
  142.         "mfsdr1 %0\n"
  143.         : "=r" (sdr1)
  144.     );
  145.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  146.    
  147.     /* Primary hash (xor) */
  148.     uint32_t h = 0;
  149.     uint32_t hash = vsid ^ page;
  150.     uint32_t base = (hash & 0x3ff) << 3;
  151.     uint32_t i;
  152.     bool found = false;
  153.    
  154.     /* Find unused or colliding
  155.        PTE in PTEG */
  156.     for (i = 0; i < 8; i++) {
  157.         if ((!phte[base + i].v) || ((phte[base + i].vsid == vsid) &&
  158.             (phte[base + i].api == api))) {
  159.             found = true;
  160.             break;
  161.         }
  162.     }
  163.    
  164.     if (!found) {
  165.         /* Secondary hash (not) */
  166.         uint32_t base2 = (~hash & 0x3ff) << 3;
  167.        
  168.         /* Find unused or colliding
  169.            PTE in PTEG */
  170.         for (i = 0; i < 8; i++) {
  171.             if ((!phte[base2 + i].v) ||
  172.                 ((phte[base2 + i].vsid == vsid) &&
  173.                 (phte[base2 + i].api == api))) {
  174.                 found = true;
  175.                 base = base2;
  176.                 h = 1;
  177.                 break;
  178.             }
  179.         }
  180.        
  181.         if (!found) {
  182.             // TODO: A/C precedence groups
  183.             i = page % 8;
  184.         }
  185.     }
  186.    
  187.     phte[base + i].v = 1;
  188.     phte[base + i].vsid = vsid;
  189.     phte[base + i].h = h;
  190.     phte[base + i].api = api;
  191.     phte[base + i].rpn = pte->pfn;
  192.     phte[base + i].r = 0;
  193.     phte[base + i].c = 0;
  194.     phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0);
  195.     phte[base + i].pp = 2; // FIXME
  196. }
  197.  
  198.  
  199. static void pht_real_insert(const uintptr_t vaddr, const pfn_t pfn)
  200. {
  201.     uint32_t page = (vaddr >> 12) & 0xffff;
  202.     uint32_t api = (vaddr >> 22) & 0x3f;
  203.    
  204.     uint32_t vsid;
  205.     asm volatile (
  206.         "mfsrin %0, %1\n"
  207.         : "=r" (vsid)
  208.         : "r" (vaddr)
  209.     );
  210.    
  211.     uint32_t sdr1;
  212.     asm volatile (
  213.         "mfsdr1 %0\n"
  214.         : "=r" (sdr1)
  215.     );
  216.     phte_t *phte_physical = (phte_t *) (sdr1 & 0xffff0000);
  217.    
  218.     /* Primary hash (xor) */
  219.     uint32_t h = 0;
  220.     uint32_t hash = vsid ^ page;
  221.     uint32_t base = (hash & 0x3ff) << 3;
  222.     uint32_t i;
  223.     bool found = false;
  224.    
  225.     /* Find unused or colliding
  226.        PTE in PTEG */
  227.     for (i = 0; i < 8; i++) {
  228.         if ((!phte_physical[base + i].v) ||
  229.             ((phte_physical[base + i].vsid == vsid) &&
  230.             (phte_physical[base + i].api == api))) {
  231.             found = true;
  232.             break;
  233.         }
  234.     }
  235.    
  236.     if (!found) {
  237.         /* Secondary hash (not) */
  238.         uint32_t base2 = (~hash & 0x3ff) << 3;
  239.        
  240.         /* Find unused or colliding
  241.            PTE in PTEG */
  242.         for (i = 0; i < 8; i++) {
  243.             if ((!phte_physical[base2 + i].v) ||
  244.                 ((phte_physical[base2 + i].vsid == vsid) &&
  245.                 (phte_physical[base2 + i].api == api))) {
  246.                 found = true;
  247.                 base = base2;
  248.                 h = 1;
  249.                 break;
  250.             }
  251.         }
  252.        
  253.         if (!found) {
  254.             // TODO: A/C precedence groups
  255.             i = page % 8;
  256.         }
  257.     }
  258.    
  259.     phte_physical[base + i].v = 1;
  260.     phte_physical[base + i].vsid = vsid;
  261.     phte_physical[base + i].h = h;
  262.     phte_physical[base + i].api = api;
  263.     phte_physical[base + i].rpn = pfn;
  264.     phte_physical[base + i].r = 0;
  265.     phte_physical[base + i].c = 0;
  266.     phte_physical[base + i].wimg = 0;
  267.     phte_physical[base + i].pp = 2; // FIXME
  268. }
  269.  
  270.  
  271. /** Process Instruction/Data Storage Interrupt
  272.  *
  273.  * @param n     Interrupt vector number.
  274.  * @param istate    Interrupted register context.
  275.  *
  276.  */
  277. void pht_refill(int n, istate_t *istate)
  278. {
  279.     uintptr_t badvaddr;
  280.     pte_t *pte;
  281.     int pfrc;
  282.     as_t *as;
  283.     bool lock;
  284.    
  285.     if (AS == NULL) {
  286.         as = AS_KERNEL;
  287.         lock = false;
  288.     } else {
  289.         as = AS;
  290.         lock = true;
  291.     }
  292.    
  293.     if (n == VECTOR_DATA_STORAGE)
  294.         badvaddr = istate->dar;
  295.     else
  296.         badvaddr = istate->pc;
  297.        
  298.     page_table_lock(as, lock);
  299.    
  300.     pte = find_mapping_and_check(as, lock, badvaddr,
  301.         PF_ACCESS_READ /* FIXME */, istate, &pfrc);
  302.     if (!pte) {
  303.         switch (pfrc) {
  304.         case AS_PF_FAULT:
  305.             goto fail;
  306.             break;
  307.         case AS_PF_DEFER:
  308.             /*
  309.              * The page fault came during copy_from_uspace()
  310.              * or copy_to_uspace().
  311.              */
  312.             page_table_unlock(as, lock);
  313.             return;
  314.         default:
  315.             panic("Unexpected pfrc (%d).", pfrc);
  316.         }
  317.     }
  318.    
  319.     pte->accessed = 1; /* Record access to PTE */
  320.     pht_insert(badvaddr, pte);
  321.    
  322.     page_table_unlock(as, lock);
  323.     return;
  324.    
  325. fail:
  326.     page_table_unlock(as, lock);
  327.     pht_refill_fail(badvaddr, istate);
  328. }
  329.  
  330.  
  331. /** Process Instruction/Data Storage Interrupt in Real Mode
  332.  *
  333.  * @param n     Interrupt vector number.
  334.  * @param istate    Interrupted register context.
  335.  *
  336.  */
  337. bool pht_real_refill(int n, istate_t *istate)
  338. {
  339.     uintptr_t badvaddr;
  340.    
  341.     if (n == VECTOR_DATA_STORAGE)
  342.         badvaddr = istate->dar;
  343.     else
  344.         badvaddr = istate->pc;
  345.    
  346.     uint32_t physmem;
  347.     asm volatile (
  348.         "mfsprg3 %0\n"
  349.         : "=r" (physmem)
  350.     );
  351.    
  352.     if ((badvaddr >= PA2KA(0)) && (badvaddr < PA2KA(physmem))) {
  353.         pht_real_insert(badvaddr, KA2PA(badvaddr) >> 12);
  354.         return true;
  355.     }
  356.    
  357.     return false;
  358. }
  359.  
  360.  
  361. void tlb_arch_init(void)
  362. {
  363.     tlb_invalidate_all();
  364. }
  365.  
  366.  
  367. void tlb_invalidate_all(void)
  368. {
  369.     asm volatile (
  370.         "tlbsync\n"
  371.     );
  372. }
  373.  
  374.  
  375. void tlb_invalidate_asid(asid_t asid)
  376. {
  377.     uint32_t sdr1;
  378.     asm volatile (
  379.         "mfsdr1 %0\n"
  380.         : "=r" (sdr1)
  381.     );
  382.     phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000);
  383.    
  384.     uint32_t i;
  385.     for (i = 0; i < 8192; i++) {
  386.         if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) &&
  387.             (phte[i].vsid < ((asid << 4) + 16)))
  388.             phte[i].v = 0;
  389.     }
  390.     tlb_invalidate_all();
  391. }
  392.  
  393.  
  394. void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
  395. {
  396.     // TODO
  397.     tlb_invalidate_all();
  398. }
  399.  
  400.  
  401. #define PRINT_BAT(name, ureg, lreg) \
  402.     asm volatile ( \
  403.         "mfspr %0," #ureg "\n" \
  404.         "mfspr %1," #lreg "\n" \
  405.         : "=r" (upper), "=r" (lower) \
  406.     ); \
  407.     mask = (upper & 0x1ffc) >> 2; \
  408.     if (upper & 3) { \
  409.         uint32_t tmp = mask; \
  410.         length = 128; \
  411.         while (tmp) { \
  412.             if ((tmp & 1) == 0) { \
  413.                 printf("ibat[0]: error in mask\n"); \
  414.                 break; \
  415.             } \
  416.             length <<= 1; \
  417.             tmp >>= 1; \
  418.         } \
  419.     } else \
  420.         length = 0; \
  421.     printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \
  422.         sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \
  423.         lower & 0xffff0000, length, mask, \
  424.         ((upper >> 1) & 1) ? " supervisor" : "", \
  425.         (upper & 1) ? " user" : "");
  426.  
  427.  
  428. void tlb_print(void)
  429. {
  430.     uint32_t sr;
  431.    
  432.     for (sr = 0; sr < 16; sr++) {
  433.         uint32_t vsid;
  434.         asm volatile (
  435.             "mfsrin %0, %1\n"
  436.             : "=r" (vsid)
  437.             : "r" (sr << 28)
  438.         );
  439.         printf("vsid[%d]: VSID=%.*p (ASID=%d)%s%s\n", sr,
  440.             sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
  441.             ((vsid >> 30) & 1) ? " supervisor" : "",
  442.             ((vsid >> 29) & 1) ? " user" : "");
  443.     }
  444.    
  445.     uint32_t upper;
  446.     uint32_t lower;
  447.     uint32_t mask;
  448.     uint32_t length;
  449.    
  450.     PRINT_BAT("ibat[0]", 528, 529);
  451.     PRINT_BAT("ibat[1]", 530, 531);
  452.     PRINT_BAT("ibat[2]", 532, 533);
  453.     PRINT_BAT("ibat[3]", 534, 535);
  454.    
  455.     PRINT_BAT("dbat[0]", 536, 537);
  456.     PRINT_BAT("dbat[1]", 538, 539);
  457.     PRINT_BAT("dbat[2]", 540, 541);
  458.     PRINT_BAT("dbat[3]", 542, 543);
  459. }
  460.  
  461. /** @}
  462.  */
  463.