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  1. /*
  2.  * Copyright (C) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/mm/tlb.h>
  30. #include <mm/tlb.h>
  31. #include <arch/mm/frame.h>
  32. #include <arch/mm/page.h>
  33. #include <arch/mm/mmu.h>
  34. #include <mm/asid.h>
  35. #include <print.h>
  36. #include <arch/types.h>
  37. #include <typedefs.h>
  38. #include <config.h>
  39. #include <arch/trap/trap.h>
  40. #include <panic.h>
  41. #include <arch/asm.h>
  42. #include <symtab.h>
  43.  
  44. char *context_encoding[] = {
  45.     "Primary",
  46.     "Secondary",
  47.     "Nucleus",
  48.     "Reserved"
  49. };
  50.  
  51. /** Initialize ITLB and DTLB.
  52.  *
  53.  * The goal of this function is to disable MMU
  54.  * so that both TLBs can be purged and new
  55.  * kernel 4M locked entry can be installed.
  56.  * After TLB is initialized, MMU is enabled
  57.  * again.
  58.  *
  59.  * Switching MMU off imposes the requirement for
  60.  * the kernel to run in identity mapped environment.
  61.  */
  62. void tlb_arch_init(void)
  63. {
  64.     tlb_tag_access_reg_t tag;
  65.     tlb_data_t data;
  66.     frame_address_t fr;
  67.     page_address_t pg;
  68.  
  69.     fr.address = config.base;
  70.     pg.address = config.base;
  71.  
  72.     immu_disable();
  73.     dmmu_disable();
  74.    
  75.     /*
  76.      * We do identity mapping of 4M-page at 4M.
  77.      */
  78.     tag.value = ASID_KERNEL;
  79.     tag.vpn = pg.vpn;
  80.  
  81.     itlb_tag_access_write(tag.value);
  82.     dtlb_tag_access_write(tag.value);
  83.  
  84.     data.value = 0;
  85.     data.v = true;
  86.     data.size = PAGESIZE_4M;
  87.     data.pfn = fr.pfn;
  88.     data.l = true;
  89.     data.cp = 1;
  90.     data.cv = 1;
  91.     data.p = true;
  92.     data.w = true;
  93.     data.g = true;
  94.  
  95.     itlb_data_in_write(data.value);
  96.     dtlb_data_in_write(data.value);
  97.  
  98.     /*
  99.      * Register window traps can occur before MMU is enabled again.
  100.      * This ensures that any such traps will be handled from
  101.      * kernel identity mapped trap handler.
  102.      */
  103.     trap_switch_trap_table();
  104.    
  105.     tlb_invalidate_all();
  106.  
  107.     dmmu_enable();
  108.     immu_enable();
  109.    
  110.     /*
  111.      * Quick hack: map frame buffer
  112.      */
  113.     fr.address = 0x1C901000000ULL;
  114.     pg.address = 0xc0000000;
  115.  
  116.     tag.value = ASID_KERNEL;
  117.     tag.vpn = pg.vpn;
  118.  
  119.     dtlb_tag_access_write(tag.value);
  120.  
  121.     data.value = 0;
  122.     data.v = true;
  123.     data.size = PAGESIZE_4M;
  124.     data.pfn = fr.pfn;
  125.     data.l = true;
  126.     data.cp = 0;
  127.     data.cv = 0;
  128.     data.p = true;
  129.     data.w = true;
  130.     data.g = true;
  131.  
  132.     dtlb_data_in_write(data.value);
  133.  
  134. }
  135.  
  136. /** ITLB miss handler. */
  137. void fast_instruction_access_mmu_miss(void)
  138. {
  139.     panic("%s\n", __FUNCTION__);
  140. }
  141.  
  142. /** DTLB miss handler. */
  143. void fast_data_access_mmu_miss(void)
  144. {
  145.     tlb_tag_access_reg_t tag;
  146.     tlb_data_t data;
  147.     __address tpc;
  148.     char *tpc_str;
  149.    
  150.     tag.value = dtlb_tag_access_read();
  151.     if (tag.context != ASID_KERNEL || tag.vpn == 0) {
  152.         tpc = tpc_read();
  153.         tpc_str = get_symtab_entry(tpc);
  154.  
  155.         printf("Faulting page: %P, ASID=%d\n", tag.vpn * PAGE_SIZE, tag.context);
  156.         printf("TPC=%P, (%s)\n", tpc, tpc_str ? tpc_str : "?");
  157.         panic("%s\n", __FUNCTION__);
  158.     }
  159.  
  160.     /*
  161.      * Identity map piece of faulting kernel address space.
  162.      */
  163.     data.value = 0;
  164.     data.v = true;
  165.     data.size = PAGESIZE_8K;
  166.     data.pfn = tag.vpn;
  167.     data.l = false;
  168.     data.cp = 1;
  169.     data.cv = 1;
  170.     data.p = true;
  171.     data.w = true;
  172.     data.g = true;
  173.  
  174.     dtlb_data_in_write(data.value);
  175. }
  176.  
  177. /** DTLB protection fault handler. */
  178. void fast_data_access_protection(void)
  179. {
  180.     panic("%s\n", __FUNCTION__);
  181. }
  182.  
  183. /** Print contents of both TLBs. */
  184. void tlb_print(void)
  185. {
  186.     int i;
  187.     tlb_data_t d;
  188.     tlb_tag_read_reg_t t;
  189.    
  190.     printf("I-TLB contents:\n");
  191.     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
  192.         d.value = itlb_data_access_read(i);
  193.         t.value = itlb_tag_read_read(i);
  194.        
  195.         printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
  196.             i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
  197.     }
  198.  
  199.     printf("D-TLB contents:\n");
  200.     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
  201.         d.value = dtlb_data_access_read(i);
  202.         t.value = dtlb_tag_read_read(i);
  203.        
  204.         printf("%d: vpn=%Q, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%X, diag=%X, pfn=%X, soft=%X, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n",
  205.             i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
  206.     }
  207.  
  208. }
  209.  
  210. /** Invalidate all unlocked ITLB and DTLB entries. */
  211. void tlb_invalidate_all(void)
  212. {
  213.     int i;
  214.     tlb_data_t d;
  215.     tlb_tag_read_reg_t t;
  216.  
  217.     for (i = 0; i < ITLB_ENTRY_COUNT; i++) {
  218.         d.value = itlb_data_access_read(i);
  219.         if (!d.l) {
  220.             t.value = itlb_tag_read_read(i);
  221.             d.v = false;
  222.             itlb_tag_access_write(t.value);
  223.             itlb_data_access_write(i, d.value);
  224.         }
  225.     }
  226.    
  227.     for (i = 0; i < DTLB_ENTRY_COUNT; i++) {
  228.         d.value = dtlb_data_access_read(i);
  229.         if (!d.l) {
  230.             t.value = dtlb_tag_read_read(i);
  231.             d.v = false;
  232.             dtlb_tag_access_write(t.value);
  233.             dtlb_data_access_write(i, d.value);
  234.         }
  235.     }
  236.    
  237. }
  238.  
  239. /** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context).
  240.  *
  241.  * @param asid Address Space ID.
  242.  */
  243. void tlb_invalidate_asid(asid_t asid)
  244. {
  245.     /* TODO: write asid to some Context register and encode the register in second parameter below. */
  246.     itlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  247.     dtlb_demap(TLB_DEMAP_CONTEXT, TLB_DEMAP_NUCLEUS, 0);
  248. }
  249.  
  250. /** Invalidate all ITLB and DTLB entries for specified page range in specified address space.
  251.  *
  252.  * @param asid Address Space ID.
  253.  * @param page First page which to sweep out from ITLB and DTLB.
  254.  * @param cnt Number of ITLB and DTLB entries to invalidate.
  255.  */
  256. void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
  257. {
  258.     int i;
  259.    
  260.     for (i = 0; i < cnt; i++) {
  261.         /* TODO: write asid to some Context register and encode the register in second parameter below. */
  262.         itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
  263.         dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, page + i * PAGE_SIZE);
  264.     }
  265. }
  266.