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  1. /*
  2.  * Copyright (C) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29.  /** @addtogroup ia64mm
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <arch/mm/as.h>
  36. #include <arch/mm/asid.h>
  37. #include <arch/mm/page.h>
  38. #include <genarch/mm/as_ht.h>
  39. #include <genarch/mm/asid_fifo.h>
  40. #include <mm/asid.h>
  41. #include <arch.h>
  42. #include <arch/barrier.h>
  43. #include <synch/spinlock.h>
  44.  
  45. /** Architecture dependent address space init. */
  46. void as_arch_init(void)
  47. {
  48.     as_operations = &as_ht_operations;
  49.     asid_fifo_init();
  50. }
  51.  
  52. /** Prepare registers for switching to another address space.
  53.  *
  54.  * @param as Address space.
  55.  */
  56. void as_install_arch(as_t *as)
  57. {
  58.     ipl_t ipl;
  59.     region_register rr;
  60.     int i;
  61.    
  62.     ipl = interrupts_disable();
  63.     spinlock_lock(&as->lock);
  64.    
  65.     ASSERT(as->asid != ASID_INVALID);
  66.    
  67.     /*
  68.      * Load respective ASID (7 consecutive RIDs) to
  69.      * region registers.
  70.      */
  71.     for (i = 0; i < REGION_REGISTERS; i++) {
  72.         if (i == VRN_KERNEL)
  73.             continue;
  74.        
  75.         rr.word = rr_read(i);
  76.         rr.map.ve = false;          /* disable VHPT walker */
  77.         rr.map.rid = ASID2RID(as->asid, i);
  78.         rr.map.ps = PAGE_WIDTH;
  79.         rr_write(i, rr.word);
  80.     }
  81.     srlz_d();
  82.     srlz_i();
  83.    
  84.     spinlock_unlock(&as->lock);
  85.     interrupts_restore(ipl);
  86. }
  87.  
  88.  /** @}
  89.  */
  90.  
  91.