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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/cpu.h>
  30. #include <arch/cpuid.h>
  31. #include <arch/pm.h>
  32.  
  33. #include <arch.h>
  34. #include <arch/types.h>
  35. #include <print.h>
  36. #include <typedefs.h>
  37. #include <fpu_context.h>
  38.  
  39. /*
  40.  * Identification of CPUs.
  41.  * Contains only non-MP-Specification specific SMP code.
  42.  */
  43. #define AMD_CPUID_EBX   0x68747541
  44. #define AMD_CPUID_ECX   0x444d4163
  45. #define AMD_CPUID_EDX   0x69746e65
  46.  
  47. #define INTEL_CPUID_EBX 0x756e6547
  48. #define INTEL_CPUID_ECX 0x6c65746e
  49. #define INTEL_CPUID_EDX 0x49656e69
  50.  
  51.  
  52. enum vendor {
  53.     VendorUnknown=0,
  54.     VendorAMD,
  55.     VendorIntel
  56. };
  57.  
  58. static char *vendor_str[] = {
  59.     "Unknown Vendor",
  60.     "AuthenticAMD",
  61.     "GenuineIntel"
  62. };
  63.  
  64.  
  65. /** Setup flags on processor so that we can use the FPU
  66.  *
  67.  * cr0.osfxsr = 1 -> we do support fxstor/fxrestor
  68.  * cr0.em = 0 -> we do not emulate coprocessor
  69.  * cr0.mp = 1 -> we do want lazy context switch
  70.  */
  71. void cpu_setup_fpu(void)
  72. {
  73.     __asm__ volatile (
  74.         "movq %%cr0, %%rax;"
  75.         "btsq $1, %%rax;" /* cr0.mp */
  76.         "btrq $2, %%rax;"  /* cr0.em */
  77.         "movq %%rax, %%cr0;"
  78.  
  79.         "movq %%cr4, %%rax;"
  80.         "bts $9, %%rax;" /* cr4.osfxsr */
  81.         "movq %%rax, %%cr4;"
  82.         :
  83.         :
  84.         :"%rax"
  85.         );
  86. }
  87.  
  88. /** Set the TS flag to 1.
  89.  *
  90.  * If a thread accesses coprocessor, exception is run, which
  91.  * does a lazy fpu context switch.
  92.  *
  93.  */
  94. void fpu_disable(void)
  95. {
  96.     __asm__ volatile (
  97.         "mov %%cr0,%%rax;"
  98.         "bts $3,%%rax;"
  99.         "mov %%rax,%%cr0;"
  100.         :
  101.         :
  102.         :"%rax"
  103.         );
  104. }
  105.  
  106. void fpu_enable(void)
  107. {
  108.     __asm__ volatile (
  109.         "mov %%cr0,%%rax;"
  110.         "btr $3,%%rax;"
  111.         "mov %%rax,%%cr0;"
  112.         :
  113.         :
  114.         :"%rax"
  115.         ); 
  116. }
  117.  
  118. void cpu_arch_init(void)
  119. {
  120.     CPU->arch.tss = tss_p;
  121.     CPU->fpu_owner=NULL;
  122. }
  123.  
  124.  
  125. void cpu_identify(void)
  126. {
  127.     cpu_info_t info;
  128.     int i;
  129.  
  130.     CPU->arch.vendor = VendorUnknown;
  131.     if (has_cpuid()) {
  132.         cpuid(0, &info);
  133.  
  134.         /*
  135.          * Check for AMD processor.
  136.          */
  137.         if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
  138.             CPU->arch.vendor = VendorAMD;
  139.         }
  140.  
  141.         /*
  142.          * Check for Intel processor.
  143.          */    
  144.         if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
  145.             CPU->arch.vendor = VendorIntel;
  146.         }
  147.                
  148.         cpuid(1, &info);
  149.         CPU->arch.family = (info.cpuid_eax>>8)&0xf;
  150.         CPU->arch.model = (info.cpuid_eax>>4)&0xf;
  151.         CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                      
  152.     }
  153. }
  154.  
  155. void cpu_print_report(cpu_t* m)
  156. {
  157.     printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
  158.         m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
  159.         m->frequency_mhz);
  160. }
  161.