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  1. /*
  2.  * Copyright (c) 2007 Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup arm32mm
  30.  * @{
  31.  */
  32. /** @file
  33.  *  @brief TLB related functions.
  34.  */
  35.  
  36. #include <mm/tlb.h>
  37. #include <arch/mm/asid.h>
  38. #include <arch/asm.h>
  39. #include <arch/types.h>
  40. #include <arch/mm/page.h>
  41.  
  42. /** Invalidate all entries in TLB.
  43.  *
  44.  * @note See ARM Architecture reference section 3.7.7 for details.
  45.  */
  46. void tlb_invalidate_all(void)
  47. {
  48.     asm volatile (
  49.         "eor r1, r1\n"
  50.         "mcr p15, 0, r1, c8, c7, 0\n"
  51.         ::: "r1"
  52.     );
  53. }
  54.  
  55. /** Invalidate all entries in TLB that belong to specified address space.
  56.  *
  57.  * @param asid Ignored as the ARM architecture doesn't support ASIDs.
  58.  */
  59. void tlb_invalidate_asid(asid_t asid)
  60. {
  61.     tlb_invalidate_all();
  62. }
  63.  
  64. /** Invalidate single entry in TLB
  65.  *
  66.  * @param page Virtual adress of the page
  67.  */
  68. static inline void invalidate_page(uintptr_t page)
  69. {
  70.     asm volatile (
  71.         "mcr p15, 0, %[page], c8, c7, 1\n"
  72.         :: [page] "r" (page)
  73.     );
  74. }
  75.  
  76. /** Invalidate TLB entries for specified page range belonging to specified
  77.  * address space.
  78.  *
  79.  * @param asid Ignored as the ARM architecture doesn't support it.
  80.  * @param page Address of the first page whose entry is to be invalidated.
  81.  * @param cnt Number of entries to invalidate.
  82.  */
  83. void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, count_t cnt)
  84. {
  85.     unsigned int i;
  86.  
  87.     for (i = 0; i < cnt; i++)
  88.         invalidate_page(page + i * PAGE_SIZE);
  89. }
  90.  
  91. void tlb_arch_init(void)
  92. {
  93. }
  94.  
  95. void tlb_print(void)
  96. {
  97. }
  98.  
  99. /** @}
  100.  */
  101.