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  1. /*
  2.  * Copyright (c) 2006 Jakub Jermar
  3.  * Copyright (c) 2008 Pavel Rimsky
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. /** @addtogroup sparc64interrupt
  31.  * @{
  32.  */
  33. /**
  34.  * @file
  35.  * @brief This file contains fast MMU trap handlers.
  36.  */
  37.  
  38. #ifndef KERN_sparc64_sun4v_MMU_TRAP_H_
  39. #define KERN_sparc64_sun4v_MMU_TRAP_H_
  40.  
  41. #include <arch/stack.h>
  42. #include <arch/regdef.h>
  43. #include <arch/arch.h>
  44. #include <arch/sun4v/hypercall.h>
  45. #include <arch/mm/tlb.h>
  46. #include <arch/mm/mmu.h>
  47. #include <arch/mm/tte.h>
  48. #include <arch/trap/regwin.h>
  49.  
  50. #ifdef CONFIG_TSB
  51. #include <arch/mm/tsb.h>
  52. #endif
  53.  
  54. #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64
  55. #define TT_FAST_DATA_ACCESS_MMU_MISS        0x68
  56. #define TT_FAST_DATA_ACCESS_PROTECTION      0x6c
  57.  
  58. #define FAST_MMU_HANDLER_SIZE           128
  59.  
  60. #ifdef __ASM__
  61.  
  62. /* MMU fault status area data fault offset */
  63. #define FSA_DFA_OFFSET              0x48
  64.  
  65. /* MMU fault status area data context */
  66. #define FSA_DFC_OFFSET              0x50
  67.  
  68. /* offset of the target address within the TTE Data entry */
  69. #define TTE_DATA_TADDR_OFFSET           13
  70.  
  71. .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER
  72.     PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
  73. .endm
  74.  
  75. /*
  76.  * Handler of the Fast Data Access MMU Miss trap. If the trap occurred in the kernel
  77.  * (context 0), an identity mapping (with displacement) is installed. Otherwise
  78.  * a higher level service routine is called.
  79.  */
  80. .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
  81.  
  82.     mov SCRATCHPAD_MMU_FSA, %g1
  83.     ldxa [%g1] ASI_SCRATCHPAD, %g1          ! g1 <= RA of MMU fault status area
  84.  
  85.     /* read faulting context */
  86.     add %g1, FSA_DFC_OFFSET, %g2            ! g2 <= RA of data fault context
  87.     ldxa [%g2] ASI_REAL, %g3            ! read the fault context
  88.  
  89.     /* read the faulting address */
  90.     add %g1, FSA_DFA_OFFSET, %g2            ! g2 <= RA of data fault address
  91.     ldxa [%g2] ASI_REAL, %g1            ! read the fault address
  92.     srlx %g1, TTE_DATA_TADDR_OFFSET, %g1        ! truncate it to page boundary
  93.     sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
  94.  
  95.     /* service by higher-level routine when context != 0 */
  96.     brnz %g3, 0f
  97.     nop
  98.  
  99.     /* exclude page number 0 from installing the identity mapping */
  100.     brz %g1, 0f
  101.     nop
  102.  
  103.     /*
  104.      * Installing the identity does not fit into 32 instructions, call
  105.      * a separate routine. The routine performs RETRY, hence the call never
  106.      * returns.
  107.      */
  108.     ba install_identity_mapping
  109.     nop
  110.  
  111.     0:
  112.  
  113.     /*
  114.      * One of the scenarios in which this trap can occur is when the
  115.      * register window spill/fill handler accesses a memory which is not
  116.      * mapped. In such a case, this handler will be called from TL = 1.
  117.      * We handle the situation by pretending that the MMU miss occurred
  118.      * on TL = 0. Once the MMU miss trap is services, the instruction which
  119.      * caused the spill/fill trap is restarted, the spill/fill trap occurs,
  120.      * but this time its handler accesse memory which IS mapped.
  121.      */
  122.     .if (\tl > 0)
  123.         wrpr %g0, 1, %tl
  124.     .endif
  125.  
  126.     /*
  127.      * Save the faulting virtual page and faulting context to the %g2
  128.      * register. The most significant 51 bits of the %g2 register will
  129.      * contain the virtual address which caused the fault truncated to the
  130.      * page boundary. The least significant 13 bits of the %g2 register
  131.      * will contain the number of the context in which the fault occurred.
  132.      * The value of the %g2 register will be passed as a parameter to the
  133.      * higher level service routine.
  134.      */
  135.     or %g1, %g3, %g2
  136.  
  137.     PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
  138. .endm
  139.  
  140. /*
  141.  * Handler of the Fast Data MMU Protection trap. Finds the trapping address
  142.  * and context and calls higher level service routine.
  143.  */
  144. .macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
  145.     /*
  146.      * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
  147.      */
  148.     .if (\tl > 0)
  149.         wrpr %g0, 1, %tl
  150.     .endif
  151.  
  152.     mov SCRATCHPAD_MMU_FSA, %g1
  153.     ldxa [%g1] ASI_SCRATCHPAD, %g1          ! g1 <= RA of MMU fault status area
  154.  
  155.     /* read faulting context */
  156.     add %g1, FSA_DFC_OFFSET, %g2            ! g2 <= RA of data fault context
  157.     ldxa [%g2] ASI_REAL, %g3            ! read the fault context
  158.  
  159.     /* read the faulting address */
  160.     add %g1, FSA_DFA_OFFSET, %g2            ! g2 <= RA of data fault address
  161.     ldxa [%g2] ASI_REAL, %g1            ! read the fault address
  162.     srlx %g1, TTE_DATA_TADDR_OFFSET, %g1        ! truncate it to page boundary
  163.     sllx %g1, TTE_DATA_TADDR_OFFSET, %g1
  164.  
  165.     /* the same as for FAST_DATA_ACCESS_MMU_MISS_HANDLER */
  166.     or %g1, %g3, %g2
  167.  
  168.     PREEMPTIBLE_HANDLER fast_data_access_protection
  169. .endm
  170.  
  171. #endif /* __ASM__ */
  172.  
  173. #endif
  174.  
  175. /** @}
  176.  */
  177.