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  1. /*
  2.  * Copyright (c) 2005 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #ifndef KERN_sparc64_sun4u_CPU_H_
  36. #define KERN_sparc64_sun4u_CPU_H_
  37.  
  38. #define MANUF_FUJITSU       0x04
  39. #define MANUF_ULTRASPARC    0x17    /**< UltraSPARC I, UltraSPARC II */
  40. #define MANUF_SUN       0x3e
  41.  
  42. #define IMPL_ULTRASPARCI    0x10
  43. #define IMPL_ULTRASPARCII   0x11
  44. #define IMPL_ULTRASPARCII_I 0x12
  45. #define IMPL_ULTRASPARCII_E 0x13
  46. #define IMPL_ULTRASPARCIII  0x14
  47. #define IMPL_ULTRASPARCIII_PLUS 0x15
  48. #define IMPL_ULTRASPARCIII_I    0x16
  49. #define IMPL_ULTRASPARCIV   0x18
  50. #define IMPL_ULTRASPARCIV_PLUS  0x19
  51.  
  52. #define IMPL_SPARC64V       0x5
  53.  
  54. #ifndef __ASM__
  55.  
  56. #include <arch/types.h>
  57. #include <typedefs.h>
  58. #include <arch/register.h>
  59. #include <arch/regdef.h>
  60. #include <arch/asm.h>
  61. #include <arch/arch.h>
  62.  
  63. #ifdef CONFIG_SMP
  64. #include <arch/mm/cache.h>
  65. #endif
  66.  
  67. typedef struct {
  68.     uint32_t mid;           /**< Processor ID as read from
  69.                          UPA_CONFIG/FIREPLANE_CONFIG. */
  70.     ver_reg_t ver;
  71.     uint32_t clock_frequency;   /**< Processor frequency in Hz. */
  72.     uint64_t next_tick_cmpr;    /**< Next clock interrupt should be
  73.                          generated when the TICK register
  74.                          matches this value. */
  75. } cpu_arch_t;
  76.  
  77. /**
  78.  * Reads the module ID (agent ID/CPUID) of the current CPU.
  79.  */
  80. static inline uint32_t read_mid(void)
  81. {
  82.     uint64_t icbus_config = asi_u64_read(ASI_ICBUS_CONFIG, 0);
  83.     icbus_config = icbus_config >> ICBUS_CONFIG_MID_SHIFT;
  84. #if defined (US)
  85.     return icbus_config & 0x1f;
  86. #elif defined (US3)
  87.     if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIII_I)
  88.         return icbus_config & 0x1f;
  89.     else
  90.         return icbus_config & 0x3ff;
  91. #else
  92.     panic("Not implemented for this architecture.");
  93.     return 0;
  94. #endif
  95. }
  96.  
  97. #endif 
  98.  
  99. #endif
  100.  
  101. /** @}
  102.  */
  103.