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  1. /*
  2.  * Copyright (c) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup mips32interrupt
  30.  * @{
  31.  */
  32. /** @file
  33.  */
  34.  
  35. #include <interrupt.h>
  36. #include <arch/interrupt.h>
  37. #include <arch/types.h>
  38. #include <arch.h>
  39. #include <arch/cp0.h>
  40. #include <time/clock.h>
  41. #include <ipc/sysipc.h>
  42. #include <ddi/device.h>
  43.  
  44. #define IRQ_COUNT 8
  45. #define TIMER_IRQ 7
  46.  
  47. function virtual_timer_fnc = NULL;
  48. static irq_t timer_irq;
  49.  
  50. /** Disable interrupts.
  51.  *
  52.  * @return Old interrupt priority level.
  53.  */
  54. ipl_t interrupts_disable(void)
  55. {
  56.     ipl_t ipl = (ipl_t) cp0_status_read();
  57.     cp0_status_write(ipl & ~cp0_status_ie_enabled_bit);
  58.     return ipl;
  59. }
  60.  
  61. /** Enable interrupts.
  62.  *
  63.  * @return Old interrupt priority level.
  64.  */
  65. ipl_t interrupts_enable(void)
  66. {
  67.     ipl_t ipl = (ipl_t) cp0_status_read();
  68.     cp0_status_write(ipl | cp0_status_ie_enabled_bit);
  69.     return ipl;
  70. }
  71.  
  72. /** Restore interrupt priority level.
  73.  *
  74.  * @param ipl Saved interrupt priority level.
  75.  */
  76. void interrupts_restore(ipl_t ipl)
  77. {
  78.     cp0_status_write(cp0_status_read() | (ipl & cp0_status_ie_enabled_bit));
  79. }
  80.  
  81. /** Read interrupt priority level.
  82.  *
  83.  * @return Current interrupt priority level.
  84.  */
  85. ipl_t interrupts_read(void)
  86. {
  87.     return cp0_status_read();
  88. }
  89.  
  90. /* TODO: This is SMP unsafe!!! */
  91. uint32_t count_hi = 0;
  92. static unsigned long nextcount;
  93. static unsigned long lastcount;
  94.  
  95. /** Start hardware clock */
  96. static void timer_start(void)
  97. {
  98.     lastcount = cp0_count_read();
  99.     nextcount = cp0_compare_value + cp0_count_read();
  100.     cp0_compare_write(nextcount);
  101. }
  102.  
  103. static irq_ownership_t timer_claim(void)
  104. {
  105.     return IRQ_ACCEPT;
  106. }
  107.  
  108. static void timer_irq_handler(irq_t *irq, void *arg, ...)
  109. {
  110.     unsigned long drift;
  111.    
  112.     if (cp0_count_read() < lastcount)
  113.         /* Count overflow detected */
  114.         count_hi++;
  115.     lastcount = cp0_count_read();
  116.    
  117.     drift = cp0_count_read() - nextcount;
  118.     while (drift > cp0_compare_value) {
  119.         drift -= cp0_compare_value;
  120.         CPU->missed_clock_ticks++;
  121.     }
  122.     nextcount = cp0_count_read() + cp0_compare_value - drift;
  123.     cp0_compare_write(nextcount);
  124.    
  125.     /*
  126.      * We are holding a lock which prevents preemption.
  127.      * Release the lock, call clock() and reacquire the lock again.
  128.      */
  129.     spinlock_unlock(&irq->lock);
  130.     clock();
  131.     spinlock_lock(&irq->lock);
  132.    
  133.     if (virtual_timer_fnc != NULL)
  134.         virtual_timer_fnc();
  135. }
  136.  
  137. /* Initialize basic tables for exception dispatching */
  138. void interrupt_init(void)
  139. {
  140.     irq_init(IRQ_COUNT, IRQ_COUNT);
  141.    
  142.     irq_initialize(&timer_irq);
  143.     timer_irq.devno = device_assign_devno();
  144.     timer_irq.inr = TIMER_IRQ;
  145.     timer_irq.claim = timer_claim;
  146.     timer_irq.handler = timer_irq_handler;
  147.     irq_register(&timer_irq);
  148.    
  149.     timer_start();
  150.     cp0_unmask_int(TIMER_IRQ);
  151. }
  152.  
  153. /** @}
  154.  */
  155.