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  1. #include <cpu.h>
  2. #include <print.h>
  3. #include <panic.h>
  4. #include <arch/types.h>
  5.  
  6. extern int IVT;
  7.  
  8.  
  9.  
  10.  
  11. void cpu_arch_init(void)
  12. {
  13.  
  14.  
  15.  
  16.     int *p=&IVT;
  17.     volatile __u64 hlp,hlp2;
  18.  
  19.  
  20.     int psr = 0x2000;
  21.    
  22.  
  23.     __asm__  volatile (
  24.         "mov cr2 = %0;;\n"
  25.         "mov psr.l = %1;;\n"
  26.         "srlz.i;"
  27.         "srlz.d;;"
  28.         :
  29.         : "r" (p), "r" (psr)
  30.     );
  31.  
  32.  
  33.  
  34.     /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/
  35.     __asm__ volatile
  36.     (
  37.         "bsw.1;;\n"
  38.     );            
  39.    
  40.  
  41. }
  42.  
  43.  
  44.