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  1. /*
  2.  * Copyright (C) 2005 - 2006 Jakub Jermar
  3.  * Copyright (C) 2006 Jakub Vana
  4.  * All rights reserved.
  5.  *
  6.  * Redistribution and use in source and binary forms, with or without
  7.  * modification, are permitted provided that the following conditions
  8.  * are met:
  9.  *
  10.  * - Redistributions of source code must retain the above copyright
  11.  *   notice, this list of conditions and the following disclaimer.
  12.  * - Redistributions in binary form must reproduce the above copyright
  13.  *   notice, this list of conditions and the following disclaimer in the
  14.  *   documentation and/or other materials provided with the distribution.
  15.  * - The name of the author may not be used to endorse or promote products
  16.  *   derived from this software without specific prior written permission.
  17.  *
  18.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  19.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  20.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  21.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  22.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  23.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  24.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  25.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  26.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  27.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  28.  */
  29.  
  30. #ifndef __ia64_PAGE_H__
  31. #define __ia64_PAGE_H__
  32.  
  33. #ifndef __ASM__
  34.  
  35.  
  36. #include <arch/mm/frame.h>
  37. #include <arch/barrier.h>
  38. #include <genarch/mm/page_ht.h>
  39. #include <arch/mm/asid.h>
  40. #include <arch/types.h>
  41. #include <typedefs.h>
  42. #include <debug.h>
  43.  
  44. #endif
  45.  
  46. #define PAGE_SIZE   FRAME_SIZE
  47. #define PAGE_WIDTH  FRAME_WIDTH
  48. #define KERNEL_PAGE_WIDTH   28
  49.  
  50.  
  51.  
  52. #define SET_PTL0_ADDRESS_ARCH(x)    /**< To be removed as situation permits. */
  53.  
  54. #define PPN_SHIFT           12
  55.  
  56. #define VRN_SHIFT           61
  57. #define VRN_MASK            (7LL << VRN_SHIFT)
  58.  
  59. #ifdef __ASM__
  60. #define VRN_KERNEL          7
  61. #else
  62. #define VRN_KERNEL          7LL
  63. #endif
  64.  
  65. #define REGION_REGISTERS        8
  66.  
  67. #define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
  68. #define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
  69.  
  70.  
  71. #define VHPT_WIDTH          20          /* 1M */
  72. #define VHPT_SIZE           (1 << VHPT_WIDTH)
  73. #define VHPT_BASE           0       /* Must be aligned to VHPT_SIZE */
  74.  
  75. #define PTA_BASE_SHIFT          15
  76.  
  77. /** Memory Attributes. */
  78. #define MA_WRITEBACK    0x0
  79. #define MA_UNCACHEABLE  0x4
  80.  
  81. /** Privilege Levels. Only the most and the least privileged ones are ever used. */
  82. #define PL_KERNEL   0x0
  83. #define PL_USER     0x3
  84.  
  85. /* Access Rigths. Only certain combinations are used by the kernel. */
  86. #define AR_READ     0x0
  87. #define AR_EXECUTE  0x1
  88. #define AR_WRITE    0x2
  89.  
  90.  
  91. #define VA_REGION_INDEX 61
  92.  
  93. #define VA_REGION(va) (va>>VA_REGION_INDEX)
  94.  
  95. #ifndef __ASM__
  96.  
  97. struct vhpt_tag_info {
  98.     unsigned long long tag : 63;
  99.     unsigned ti : 1;
  100. } __attribute__ ((packed));
  101.  
  102. union vhpt_tag {
  103.     struct vhpt_tag_info tag_info;
  104.     unsigned tag_word;
  105. };
  106.  
  107. struct vhpt_entry_present {
  108.     /* Word 0 */
  109.     unsigned p : 1;
  110.     unsigned : 1;
  111.     unsigned ma : 3;
  112.     unsigned a : 1;
  113.     unsigned d : 1;
  114.     unsigned pl : 2;
  115.     unsigned ar : 3;
  116.     unsigned long long ppn : 38;
  117.     unsigned : 2;
  118.     unsigned ed : 1;
  119.     unsigned ig1 : 11;
  120.    
  121.     /* Word 1 */
  122.     unsigned : 2;
  123.     unsigned ps : 6;
  124.     unsigned key : 24;
  125.     unsigned : 32;
  126.    
  127.     /* Word 2 */
  128.     union vhpt_tag tag;
  129.    
  130.     /* Word 3 */                                                   
  131.     __u64 ig3 : 64;
  132. } __attribute__ ((packed));
  133.  
  134. struct vhpt_entry_not_present {
  135.     /* Word 0 */
  136.     unsigned p : 1;
  137.     unsigned long long ig0 : 52;
  138.     unsigned ig1 : 11;
  139.    
  140.     /* Word 1 */
  141.     unsigned : 2;
  142.     unsigned ps : 6;
  143.     unsigned long long ig2 : 56;
  144.  
  145.     /* Word 2 */
  146.     union vhpt_tag tag;
  147.    
  148.     /* Word 3 */                                                   
  149.     __u64 ig3 : 64;
  150. } __attribute__ ((packed));
  151.  
  152. typedef union vhpt_entry {
  153.     struct vhpt_entry_present present;
  154.     struct vhpt_entry_not_present not_present;
  155.     __u64 word[4];
  156. } vhpt_entry_t;
  157.  
  158. typedef vhpt_entry_t tlb_entry_t;
  159.  
  160. struct region_register_map {
  161.     unsigned ve : 1;
  162.     unsigned : 1;
  163.     unsigned ps : 6;
  164.     unsigned rid : 24;
  165.     unsigned : 32;
  166. } __attribute__ ((packed));
  167.  
  168. typedef union region_register {
  169.     struct region_register_map map;
  170.     unsigned long long word;
  171. } region_register;
  172.  
  173. struct pta_register_map {
  174.     unsigned ve : 1;
  175.     unsigned : 1;
  176.     unsigned size : 6;
  177.     unsigned vf : 1;
  178.     unsigned : 6;
  179.     unsigned long long base : 49;
  180. } __attribute__ ((packed));
  181.  
  182. typedef union pta_register {
  183.     struct pta_register_map map;
  184.     __u64 word;
  185. } pta_register;
  186.  
  187. /** Return Translation Hashed Entry Address.
  188.  *
  189.  * VRN bits are used to read RID (ASID) from one
  190.  * of the eight region registers registers.
  191.  *
  192.  * @param va Virtual address including VRN bits.
  193.  *
  194.  * @return Address of the head of VHPT collision chain.
  195.  */
  196. static inline __u64 thash(__u64 va)
  197. {
  198.     __u64 ret;
  199.  
  200.     __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
  201.  
  202.     return ret;
  203. }
  204.  
  205. /** Return Translation Hashed Entry Tag.
  206.  *
  207.  * VRN bits are used to read RID (ASID) from one
  208.  * of the eight region registers.
  209.  *
  210.  * @param va Virtual address including VRN bits.
  211.  *
  212.  * @return The unique tag for VPN and RID in the collision chain returned by thash().
  213.  */
  214. static inline __u64 ttag(__u64 va)
  215. {
  216.     __u64 ret;
  217.  
  218.     __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
  219.  
  220.     return ret;
  221. }
  222.  
  223. /** Read Region Register.
  224.  *
  225.  * @param i Region register index.
  226.  *
  227.  * @return Current contents of rr[i].
  228.  */
  229. static inline __u64 rr_read(index_t i)
  230. {
  231.     __u64 ret;
  232.     ASSERT(i < REGION_REGISTERS);
  233.     i=i<<VRN_SHIFT;
  234.     __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
  235.    
  236.     return ret;
  237. }
  238.  
  239.  
  240. /** Write Region Register.
  241.  *
  242.  * @param i Region register index.
  243.  * @param v Value to be written to rr[i].
  244.  */
  245. static inline void rr_write(index_t i, __u64 v)
  246. {
  247.     ASSERT(i < REGION_REGISTERS);
  248.     i=i<<VRN_SHIFT;
  249.     __asm__ volatile (
  250.     "mov rr[%0] = %1;;\n"
  251.     :
  252.     : "r" (i), "r" (v));
  253. }
  254.  
  255. /** Read Page Table Register.
  256.  *
  257.  * @return Current value stored in PTA.
  258.  */
  259. static inline __u64 pta_read(void)
  260. {
  261.     __u64 ret;
  262.    
  263.     __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
  264.    
  265.     return ret;
  266. }
  267.  
  268. /** Write Page Table Register.
  269.  *
  270.  * @param v New value to be stored in PTA.
  271.  */
  272. static inline void pta_write(__u64 v)
  273. {
  274.     __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
  275. }
  276.  
  277. extern void page_arch_init(void);
  278.  
  279. extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
  280. extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
  281. extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
  282.  
  283.  
  284.  
  285. #endif
  286.  
  287. #endif
  288.  
  289.  
  290.