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  1. /*
  2.  * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29.  
  30. /** @addtogroup arm32boot
  31.  * @{
  32.  */
  33. /** @file
  34.  */
  35.  
  36.  
  37. #ifndef BOOT_arm32__MM_H
  38. #define BOOT_arm32__MM_H
  39.  
  40.  
  41. #ifndef __ASM__
  42. #include "types.h"
  43. #endif
  44.  
  45.  
  46. /** Frame width. */
  47. #define FRAME_WIDTH                 20                  /* 4KB frames */
  48.  
  49. /** Frame size. */
  50. #define FRAME_SIZE                  (1 << FRAME_WIDTH)
  51.  
  52. /** Page size in 2-level paging which is switched on later in the kernel initialization. */
  53. #define PAGE_SIZE                   (1 << 12)
  54.  
  55.  
  56. #ifndef __ASM__
  57. #   define KA2PA(x)                 (((uintptr_t) (x)) - 0x80000000)
  58. #   define PA2KA(x)                 (((uintptr_t) (x)) + 0x80000000)
  59. #else
  60. #   define KA2PA(x)                 ((x) - 0x80000000)
  61. #   define PA2KA(x)                 ((x) + 0x80000000)
  62. #endif
  63.  
  64.  
  65. /** Number of entries in PTL0. */
  66. #define PTL0_ENTRIES                (1<<12)             /* 4096 */
  67.  
  68. /** Size of an entry in PTL0. */
  69. #define PTL0_ENTRY_SIZE             4
  70.  
  71. /** Returns number of frame the address belongs to. */
  72. #define ADDR2PFN( addr )            ( ((uintptr_t)(addr)) >> FRAME_WIDTH )
  73.  
  74. /** Describes "section" page table entry (one-level paging with 1MB sized pages). */  
  75. #define PTE_DESCRIPTOR_SECTION      0x2
  76.  
  77. /** Page table access rights: user - no access, kernel - read/write. */
  78. #define PTE_AP_USER_NO_KERNEL_RW    0x1
  79.  
  80.  
  81. #ifndef __ASM__
  82.  
  83.  
  84. /** Page table level 0 entry - "section" format is used (one-level paging, 1MB sized
  85.  * pages). Used only while booting the kernel. */
  86. typedef struct {
  87.     unsigned descriptor_type     : 2;
  88.     unsigned bufferable          : 1;
  89.     unsigned cacheable           : 1;
  90.     unsigned impl_specific       : 1;
  91.     unsigned domain              : 4;
  92.     unsigned should_be_zero_1    : 1;
  93.     unsigned access_permission   : 2;  
  94.     unsigned should_be_zero_2    : 8;
  95.     unsigned section_base_addr   : 12;
  96. } __attribute__ ((packed)) pte_level0_section_t;
  97.  
  98.  
  99. /** Page table that holds 1:1 virtual to physical mapping used while booting the kernel. */
  100. extern pte_level0_section_t page_table[PTL0_ENTRIES];
  101.  
  102. extern void mmu_start(void);
  103.  
  104.  
  105. /** Enables paging. */
  106. static inline void enable_paging()
  107. {
  108.     /* c3 - each two bits controls access to the one of domains (16)
  109.      *      0b01 - behave as a client (user) of a domain
  110.      */
  111.     asm volatile (
  112.         // behave as a client of domains
  113.         "ldr r0, =0x55555555       \n"
  114.         "mcr p15, 0, r0, c3, c0, 0 \n"
  115.  
  116.         // current settings
  117.         "mrc p15, 0, r0, c1, c0, 0 \n"
  118.  
  119.         // mask to enable paging
  120.         "ldr r1, =0x00000001       \n"
  121.         "orr r0, r0, r1            \n"
  122.  
  123.         // store settings
  124.         "mcr p15, 0, r0, c1, c0, 0 \n"
  125.         :
  126.         :
  127.         : "r0", "r1"
  128.     );
  129. }
  130.  
  131.  
  132. /** Sets the address of level 0 page table to CP15 register 2.
  133.  *
  134.  * @param pt Address of a page table to set.
  135.  */  
  136. static inline void set_ptl0_address(pte_level0_section_t* pt)
  137. {
  138.     asm volatile (
  139.         "mcr p15, 0, %0, c2, c0, 0 \n"
  140.         :
  141.         : "r"(pt)
  142.     );
  143. }
  144.  
  145.  
  146. #endif
  147.  
  148. #endif
  149.  
  150. /** @}
  151.  */
  152.  
  153.