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  1. /*
  2.  * Copyright (c) 2006 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup sparc64
  30.  * @{
  31.  */
  32. /**
  33.  * @file
  34.  * @brief   FireHose Controller (FHC) driver.
  35.  *
  36.  * Note that this driver is a result of reverse engineering
  37.  * rather than implementation of a specification. This
  38.  * is due to the fact that the FHC documentation is not
  39.  * publicly available.
  40.  */
  41.  
  42. #include <arch/drivers/fhc.h>
  43. #include <arch/trap/interrupt.h>
  44. #include <mm/page.h>
  45. #include <mm/slab.h>
  46. #include <arch/types.h>
  47. #include <genarch/ofw/ofw_tree.h>
  48. #include <sysinfo/sysinfo.h>
  49.  
  50. fhc_t *central_fhc = NULL;
  51.  
  52. /**
  53.  * I suspect this must be hardcoded in the FHC.
  54.  * If it is not, than we can read all IMAP registers
  55.  * and get the complete mapping.
  56.  */
  57. #define FHC_UART_INR    0x39   
  58.  
  59. #define FHC_UART_IMAP   0x0
  60. #define FHC_UART_ICLR   0x4
  61.  
  62. #define UART_IMAP_REG   4
  63.  
  64. fhc_t *fhc_init(ofw_tree_node_t *node)
  65. {
  66.     fhc_t *fhc;
  67.     ofw_tree_property_t *prop;
  68.  
  69.     prop = ofw_tree_getprop(node, "reg");
  70.    
  71.     if (!prop || !prop->value)
  72.         return NULL;
  73.        
  74.     count_t regs = prop->size / sizeof(ofw_central_reg_t);
  75.     if (regs + 1 < UART_IMAP_REG)
  76.         return NULL;
  77.  
  78.     ofw_central_reg_t *reg = &((ofw_central_reg_t *) prop->value)[UART_IMAP_REG];
  79.  
  80.     uintptr_t paddr;
  81.     if (!ofw_central_apply_ranges(node->parent, reg, &paddr))
  82.         return NULL;
  83.  
  84.     fhc = (fhc_t *) malloc(sizeof(fhc_t), FRAME_ATOMIC);
  85.     if (!fhc)
  86.         return NULL;
  87.  
  88.     fhc->uart_imap = (uint32_t *) hw_map(paddr, reg->size);
  89.    
  90.     /*
  91.      * Set sysinfo data needed by the uspace FHC driver.
  92.      */
  93.     sysinfo_set_item_val("fhc.uart.size", NULL, reg->size);
  94.     sysinfo_set_item_val("fhc.uart.physical", NULL, paddr);
  95.     sysinfo_set_item_val("kbd.cir.fhc", NULL, 1);
  96.  
  97.     return fhc;
  98. }
  99.  
  100. void fhc_enable_interrupt(fhc_t *fhc, int inr)
  101. {
  102.     switch (inr) {
  103.     case FHC_UART_INR:
  104.         fhc->uart_imap[FHC_UART_IMAP] |= IMAP_V_MASK;
  105.         break;
  106.     default:
  107.         panic("Unexpected INR (%d).", inr);
  108.         break;
  109.     }
  110. }
  111.  
  112. void fhc_clear_interrupt(void *fhcp, int inr)
  113. {
  114.     fhc_t *fhc = (fhc_t *)fhcp;
  115.     ASSERT(fhc->uart_imap);
  116.  
  117.     switch (inr) {
  118.     case FHC_UART_INR:
  119.         fhc->uart_imap[FHC_UART_ICLR] = 0;
  120.         break;
  121.     default:
  122.         panic("Unexpected INR (%d).", inr);
  123.         break;
  124.     }
  125. }
  126.  
  127. /** @}
  128.  */
  129.