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  1. /*
  2.  * Copyright (C) 2003-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #include <arch/exception.h>
  30. #include <arch/interrupt.h>
  31. #include <panic.h>
  32. #include <arch/cp0.h>
  33. #include <arch/types.h>
  34. #include <arch.h>
  35. #include <debug.h>
  36.  
  37. void exception(struct exception_regdump *pstate)
  38. {
  39.     int cause;
  40.     int excno;
  41.     __u32 epc_shift = 0;
  42.  
  43.     ASSERT(CPU != NULL);
  44.  
  45.     /*
  46.      * NOTE ON OPERATION ORDERING
  47.      *
  48.      * On entry, cpu_priority_high() must be called before
  49.      * exception bit is cleared.
  50.      */
  51.  
  52.     cpu_priority_high();
  53.     cp0_status_write(cp0_status_read() & ~ (cp0_status_exl_exception_bit |
  54.                         cp0_status_um_bit));
  55.  
  56.     /* Save pstate so that the threads can access it */
  57.     /* If THREAD->pstate is set, this is nested exception,
  58.      * do not rewrite it
  59.      */
  60.     if (THREAD && !THREAD->pstate)
  61.         THREAD->pstate = pstate;
  62.  
  63.     cause = cp0_cause_read();
  64.     excno = cp0_cause_excno(cause);
  65.     /* decode exception number and process the exception */
  66.     switch (excno) {
  67.         case EXC_Int:
  68.             interrupt();
  69.             break;
  70.         case EXC_TLBL:
  71.         case EXC_TLBS:
  72.             tlb_invalid(pstate);
  73.             break;
  74.         case EXC_CpU:
  75. #ifdef FPU_LAZY    
  76.             if (cp0_cause_coperr(cause) == fpu_cop_id)
  77.                 scheduler_fpu_lazy_request();
  78.             else
  79. #endif
  80.                 panic("unhandled Coprocessor Unusable Exception\n");
  81.             break;
  82.         case EXC_Mod:
  83.             panic("unhandled TLB Modification Exception\n");
  84.             break;
  85.         case EXC_AdEL:
  86.             panic("unhandled Address Error Exception - load or instruction fetch\n");
  87.             break;
  88.         case EXC_AdES:
  89.             panic("unhandled Address Error Exception - store\n");
  90.             break;
  91.         case EXC_IBE:
  92.             panic("unhandled Bus Error Exception - fetch instruction\n");
  93.             break;
  94.         case EXC_DBE:
  95.             panic("unhandled Bus Error Exception - data reference: load or store\n");
  96.             break;
  97.         case EXC_Bp:
  98.             /* it is necessary to not re-execute BREAK instruction after returning from Exception handler
  99.                (see page 138 in R4000 Manual for more information) */
  100.             epc_shift = 4;
  101.             break;
  102.         case EXC_RI:
  103.             panic("unhandled Reserved Instruction Exception\n");
  104.             break;
  105.         case EXC_Ov:
  106.             panic("unhandled Arithmetic Overflow Exception\n");
  107.             break;
  108.         case EXC_Tr:
  109.             panic("unhandled Trap Exception\n");
  110.             break;
  111.         case EXC_VCEI:
  112.             panic("unhandled Virtual Coherency Exception - instruction\n");
  113.             break;
  114.         case EXC_FPE:
  115.             panic("unhandled Floating-Point Exception\n");
  116.             break;
  117.         case EXC_WATCH:
  118.             panic("unhandled reference to WatchHi/WatchLo address\n");
  119.             break;
  120.         case EXC_VCED:
  121.             panic("unhandled Virtual Coherency Exception - data\n");
  122.             break;
  123.         default:
  124.             panic("unhandled exception %d\n", excno);
  125.     }
  126.    
  127.     pstate->epc += epc_shift;
  128.     /* Set to NULL, so that we can still support nested
  129.      * exceptions
  130.      * TODO: We should probably set EXL bit before this command,
  131.      * nesting. On the other hand, if some exception occurs between
  132.      * here and ERET, it won't set anything on the pstate anyway.
  133.      */
  134.     if (THREAD)
  135.         THREAD->pstate = NULL;
  136. }
  137.