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  1. /*
  2.  * Copyright (c) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup ia32   
  30.  * @{
  31.  */
  32. /**
  33.  * @file
  34.  * @brief PIC driver.
  35.  *
  36.  * Programmable Interrupt Controller for UP systems based on i8259 chip.
  37.  */
  38.  
  39. #include <arch/drivers/i8259.h>
  40. #include <cpu.h>
  41. #include <arch/types.h>
  42. #include <arch/asm.h>
  43. #include <arch.h>
  44. #include <print.h>
  45. #include <interrupt.h>
  46.  
  47. static void pic_spurious(int n, istate_t *istate);
  48.  
  49. void i8259_init(void)
  50. {
  51.     /* ICW1: this is ICW1, ICW4 to follow */
  52.     pio_write_8(PIC_PIC0PORT1, PIC_ICW1 | PIC_NEEDICW4);
  53.  
  54.     /* ICW2: IRQ 0 maps to INT IRQBASE */
  55.     pio_write_8(PIC_PIC0PORT2, IVT_IRQBASE);
  56.  
  57.     /* ICW3: pic1 using IRQ IRQ_PIC1 */
  58.     pio_write_8(PIC_PIC0PORT2, 1 << IRQ_PIC1);
  59.  
  60.     /* ICW4: i8086 mode */
  61.     pio_write_8(PIC_PIC0PORT2, 1);
  62.  
  63.     /* ICW1: ICW1, ICW4 to follow */
  64.     pio_write_8(PIC_PIC1PORT1, PIC_ICW1 | PIC_NEEDICW4);
  65.  
  66.     /* ICW2: IRQ 8 maps to INT (IVT_IRQBASE + 8) */
  67.     pio_write_8(PIC_PIC1PORT2, IVT_IRQBASE + 8);
  68.  
  69.     /* ICW3: pic1 is known as IRQ_PIC1 */
  70.     pio_write_8(PIC_PIC1PORT2, IRQ_PIC1);
  71.  
  72.     /* ICW4: i8086 mode */
  73.     pio_write_8(PIC_PIC1PORT2, 1);
  74.  
  75.     /*
  76.      * Register interrupt handler for the PIC spurious interrupt.
  77.      */
  78.     exc_register(VECTOR_PIC_SPUR, "pic_spurious", (iroutine) pic_spurious);
  79.  
  80.     /*
  81.      * Set the enable/disable IRQs handlers.
  82.      * Set the End-of-Interrupt handler.
  83.      */
  84.     enable_irqs_function = pic_enable_irqs;
  85.     disable_irqs_function = pic_disable_irqs;
  86.     eoi_function = pic_eoi;
  87.  
  88.     pic_disable_irqs(0xffff);       /* disable all irq's */
  89.     pic_enable_irqs(1 << IRQ_PIC1);     /* but enable pic1 */
  90. }
  91.  
  92. void pic_enable_irqs(uint16_t irqmask)
  93. {
  94.     uint8_t x;
  95.  
  96.     if (irqmask & 0xff) {
  97.         x = pio_read_8(PIC_PIC0PORT2);
  98.         pio_write_8(PIC_PIC0PORT2, (uint8_t) (x & (~(irqmask & 0xff))));
  99.     }
  100.     if (irqmask >> 8) {
  101.         x = pio_read_8(PIC_PIC1PORT2);
  102.         pio_write_8(PIC_PIC1PORT2, (uint8_t) (x & (~(irqmask >> 8))));
  103.     }
  104. }
  105.  
  106. void pic_disable_irqs(uint16_t irqmask)
  107. {
  108.     uint8_t x;
  109.  
  110.     if (irqmask & 0xff) {
  111.         x = pio_read_8(PIC_PIC0PORT2);
  112.         pio_write_8(PIC_PIC0PORT2, (uint8_t) (x | (irqmask & 0xff)));
  113.     }
  114.     if (irqmask >> 8) {
  115.         x = pio_read_8(PIC_PIC1PORT2);
  116.         pio_write_8(PIC_PIC1PORT2, (uint8_t) (x | (irqmask >> 8)));
  117.     }
  118. }
  119.  
  120. void pic_eoi(void)
  121. {
  122.     pio_write_8((ioport8_t *)0x20, 0x20);
  123.     pio_write_8((ioport8_t *)0xa0, 0x20);
  124. }
  125.  
  126. void pic_spurious(int n __attribute__((unused)), istate_t *istate __attribute__((unused)))
  127. {
  128. #ifdef CONFIG_DEBUG
  129.     printf("cpu%u: PIC spurious interrupt\n", CPU->id);
  130. #endif
  131. }
  132.  
  133. /** @}
  134.  */
  135.