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  1. /*
  2.  * Copyright (C) 2001-2004 Jakub Jermar
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. #ifndef __APIC_H__
  30. #define __APIC_H__
  31.  
  32. #include <arch/types.h>
  33. #include <cpu.h>
  34.  
  35. #define FIXED       (0<<0)
  36. #define LOPRI       (1<<0)
  37.  
  38. /* local APIC macros */
  39. #define IPI_INIT    0
  40. #define IPI_STARTUP 0
  41.  
  42. #define DLVRMODE_FIXED  (0<<8)
  43. #define DLVRMODE_INIT   (5<<8)
  44. #define DLVRMODE_STUP   (6<<8)
  45. #define DESTMODE_PHYS   (0<<11)
  46. #define DESTMODE_LOGIC  (1<<11)
  47. #define LEVEL_ASSERT    (1<<14)
  48. #define LEVEL_DEASSERT  (0<<14)
  49. #define TRGRMODE_LEVEL  (1<<15)
  50. #define TRGRMODE_EDGE   (0<<15)
  51. #define SHORTHAND_DEST  (0<<18)
  52. #define SHORTHAND_INCL  (2<<18)
  53. #define SHORTHAND_EXCL  (3<<18)
  54.  
  55. #define SEND_PENDING    (1<<12)
  56.  
  57. /* Interrupt Command Register */
  58. #define ICRlo       (0x300/sizeof(__u32))
  59. #define ICRhi       (0x310/sizeof(__u32))
  60. #define ICRloClear  ((1<<13)|(3<<16)|(0xfff<<20))
  61. #define ICRhiClear  (0xffffff<<0)
  62.  
  63. /* End Of Interrupt */
  64. #define EOI     (0x0b0/sizeof(__u32))
  65.  
  66. /* Error Status Register */
  67. #define ESR     (0x280/sizeof(__u32))
  68. #define ESRClear    ((0xffffff<<8)|(1<<4))
  69.  
  70. /* Task Priority Register */
  71. #define TPR     (0x080/sizeof(__u32))
  72. #define TPRClear    0xffffff00
  73.  
  74. /* Spurious Vector Register */
  75. #define SVR     (0x0f0/sizeof(__u32))
  76. #define SVRClear    (~0x3f0)
  77.  
  78. /* Time Divide Configuratio Register */
  79. #define TDCR        (0x3e0/sizeof(__u32))
  80. #define TDCRClear   (~0xb)
  81.  
  82. /* Initial Count Register for Timer */
  83. #define ICRT        (0x380/sizeof(__u32))
  84.  
  85. /* Current Count Register for Timer */
  86. #define CCRT        (0x390/sizeof(__u32))
  87.  
  88. /* LVT */
  89. #define LVT_Tm      (0x320/sizeof(__u32))
  90. #define LVT_LINT0   (0x350/sizeof(__u32))
  91. #define LVT_LINT1   (0x360/sizeof(__u32))
  92. #define LVT_Err     (0x370/sizeof(__u32))
  93. #define LVT_PCINT   (0x340/sizeof(__u32))
  94.  
  95. /* Local APIC ID Register */
  96. #define L_APIC_ID   (0x020/sizeof(__u32))
  97. #define L_APIC_IDClear  (~(0xf<<24))
  98.  
  99. /* IO APIC */
  100. #define IOREGSEL    (0x00/sizeof(__u32))
  101. #define IOWIN       (0x10/sizeof(__u32))
  102.  
  103. #define IOAPICID    0x00
  104. #define IOAPICVER   0x01
  105. #define IOAPICARB   0x02
  106. #define IOREDTBL    0x10
  107.  
  108.  
  109. extern volatile __u32 *l_apic;
  110. extern volatile __u32 *io_apic;
  111.  
  112. extern __u32 apic_id_mask;
  113.  
  114. extern void apic_init(void);
  115. extern void apic_spurious(__u8 n, __u32 stack[]);
  116.  
  117. extern void l_apic_init(void);
  118. extern void l_apic_eoi(void);
  119. extern int l_apic_broadcast_custom_ipi(__u8 vector);
  120. extern int l_apic_send_init_ipi(__u8 apicid);
  121. extern void l_apic_debug(void);
  122. extern void l_apic_timer_interrupt(__u8 n, __u32 stack[]);
  123.  
  124. extern __u32 io_apic_read(__u8 address);
  125. extern void io_apic_write(__u8 address , __u32 x);
  126. extern void io_apic_change_ioredtbl(int signal, int dest, __u8 v, int flags);
  127. extern void io_apic_disable_irqs(__u16 irqmask);
  128. extern void io_apic_enable_irqs(__u16 irqmask);
  129.  
  130. #endif
  131.