/*
* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* - Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* - Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* - The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/** @addtogroup arm32boot
* @{
*/
/** @file
*/
#ifndef __MM_H__
#define __MM_H__
#ifndef __ASM__
#include "types.h"
#endif
#define FRAME_WIDTH 12 /* 4KB frames */
#define FRAME_SIZE (1 << FRAME_WIDTH)
#define PAGE_WIDTH FRAME_WIDTH
#define PAGE_SIZE FRAME_SIZE
#ifndef __ASM__
# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
# define KA2PA(x) ((x) - 0x80000000)
# define PA2KA(x) ((x) + 0x80000000)
#endif
/** Number of entries in PTL0 */
#define PTL0_ENTRIES_ARCH (1<<12) /* 4096 */
/** Frames per 1MB section */
#define FRAMES_PER_SECTION ( ( 1 << 20 ) / FRAME_SIZE )
/** Converts adress to frame number */
#define ADDR2PFN( addr ) ( ((uintptr_t)(addr))>>FRAME_WIDTH )
/** Descriptor type that signs "section" page table entry
* (one-level paging with 1MB sized pages) */
#define PTE_DESCRIPTOR_SECTION 2
/** Access rights to page table: user-no access, kernel-read/write */
#define PTE_AP_USER_NO_KERNEL_RW 1
#ifndef __ASM__
/** Page table level 0 entry - "section" format (one-level paging, 1MB sized
* pages). Used only for booting the kernel. */
typedef struct {
unsigned descriptor_type : 2;
unsigned bufferable : 1;
unsigned cacheable : 1;
unsigned impl_specific : 1;
unsigned domain : 4;
unsigned should_be_zero_1 : 1;
unsigned access_permission : 2;
unsigned should_be_zero_2 : 8;
unsigned section_base_addr : 12;
} __attribute__ ((packed)) pte_level0_section_t;
/** Page table that holds 1:1 mapping for booting the kernel. */
extern pte_level0_section_t page_table[PTL0_ENTRIES_ARCH];
/** Starts the MMU - initializes page table and enables paging. */
void mmu_start(void);
/** Enables paging. */
static inline void enable_paging()
{
/* c3 - each two bits controls access to the one of domains (16)
* 0b01 - behave as a client (user) of a domain
*/
asm volatile (
// behave as a client of domains
"ldr r0, =0x55555555 \n"
"mcr p15, 0, r0, c3, c0, 0 \n"
// current settings
"mrc p15, 0, r0, c1, c0, 0 \n"
/* TODO: talk to Alf why needed
// mask to disable aligment checks; system & rom bit set to 0 (has no
// special effect)
"ldr r1, =0xfffffe8f \n"
"and r0, r0, r1 \n"
*/
// mask to enable paging
"ldr r1, =0x00000001 \n"
"orr r0, r0, r1 \n"
// store settings
"mcr p15, 0, r0, c1, c0, 0 \n"
:
:
: "r0", "r1"
);
}
/** Sets the address of level 0 page table.
* \param pt pointer to the page table to set
*/
static inline void set_ptl0_address(pte_level0_section_t* pt)
{
asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"
:
: "r"(pt)
);
}
#endif
#endif
/** @}
*/