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  1. /*
  2.  * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
  3.  * All rights reserved.
  4.  *
  5.  * Redistribution and use in source and binary forms, with or without
  6.  * modification, are permitted provided that the following conditions
  7.  * are met:
  8.  *
  9.  * - Redistributions of source code must retain the above copyright
  10.  *   notice, this list of conditions and the following disclaimer.
  11.  * - Redistributions in binary form must reproduce the above copyright
  12.  *   notice, this list of conditions and the following disclaimer in the
  13.  *   documentation and/or other materials provided with the distribution.
  14.  * - The name of the author may not be used to endorse or promote products
  15.  *   derived from this software without specific prior written permission.
  16.  *
  17.  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  18.  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  19.  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  20.  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21.  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22.  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  23.  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  24.  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25.  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26.  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27.  */
  28.  
  29. /** @addtogroup libcarm32
  30.  * @{
  31.  */
  32. /** @file
  33.  *  @brief Uspace threads and TLS.
  34.  */
  35.  
  36. #ifndef LIBC_arm32_THREAD_H_
  37. #define LIBC_arm32_THREAD_H_
  38.  
  39. #include <unistd.h>
  40.  
  41. /** Stack initial size. */
  42. #define THREAD_INITIAL_STACK_PAGES_NO 1
  43.  
  44. /** Offsets for accessing __thread variables are shifted 8 bytes higher. */
  45. #define ARM_TP_OFFSET   (-8)
  46.  
  47. /** TCB (Thread Control Block) struct.
  48.  *
  49.  *  TLS starts just after this struct.
  50.  */
  51. typedef struct {
  52.     /** Fibril data. */
  53.     void *fibril_data;
  54. } tcb_t;
  55.  
  56.  
  57. /** Sets TLS address to the r9 register.
  58.  *
  59.  *  @param tcb TCB (TLS starts behind)
  60.  */
  61. static inline void __tcb_set(tcb_t *tcb)
  62. {
  63.     void *tls = (void *) tcb;
  64.     tls += sizeof(tcb_t) + ARM_TP_OFFSET;
  65.     asm volatile (
  66.         "mov r9, %0"
  67.         :
  68.         : "r"(tls)
  69.     );
  70. }
  71.  
  72.  
  73. /** Returns TCB address.
  74.  *
  75.  * @return TCB address (starts before TLS which address is stored in r9 register).
  76.  */
  77. static inline tcb_t *__tcb_get(void)
  78. {
  79.     void *ret;
  80.     asm volatile (
  81.         "mov %0, r9"
  82.         : "=r"(ret)
  83.     );
  84.     return (tcb_t *) (ret - ARM_TP_OFFSET - sizeof(tcb_t));
  85. }
  86.  
  87.  
  88. /** Returns TLS address stored.
  89.  *
  90.  *  Implemented in assembly.
  91.  *
  92.  *  @return TLS address stored in r9 register
  93.  */
  94. extern uintptr_t __aeabi_read_tp(void);
  95.  
  96. #endif
  97.  
  98. /** @}
  99.  */
  100.