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| 29 | /* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */ |
29 | /* TLS for MIPS is described in http://www.linux-mips.org/wiki/NPTL */ |
| 30 | 30 | ||
| 31 | #ifndef __LIBC__mips32THREAD_H__ |
31 | #ifndef __LIBC__mips32THREAD_H__ |
| 32 | #define __LIBC__mips32THREAD_H__ |
32 | #define __LIBC__mips32THREAD_H__ |
| 33 | 33 | ||
| - | 34 | /* I did not find any specification (neither MIPS nor PowerPC), but |
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| - | 35 | * as I found it |
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| - | 36 | * - it uses Variant II |
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| - | 37 | * - TCB is at Address(First TLS Block)+0x7000. |
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| - | 38 | * - DTV is at Address(First TLS Block)+0x8000 |
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| - | 39 | * - What would happen if the TLS data was larger then 0x7000? |
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| - | 40 | * - The linker never accesses DTV directly, has the second definition any |
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| - | 41 | * sense? |
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| - | 42 | * We will make it this way: |
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| - | 43 | * - TCB is at TP-0x7000-sizeof(tcb) |
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| - | 44 | * - No assumption about DTV etc., but it will not have a fixed address |
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| - | 45 | */ |
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| - | 46 | #define MIPS_TP_OFFSET 0x7000 |
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| - | 47 | ||
| - | 48 | typedef struct { |
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| - | 49 | void *pst_data; |
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| - | 50 | } tcb_t; |
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| - | 51 | ||
| 34 | static inline void __tls_set(void *tls) |
52 | static inline void __tcb_set(tcb_t *tcb) |
| 35 | { |
53 | { |
| - | 54 | void *tp = tcb; |
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| - | 55 | tp += MIPS_TP_OFFSET + sizeof(tcb_t); |
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| - | 56 | ||
| 36 | __asm__ volatile ("add $27, %0, $0" : : "r"(tls)); /* Move tls to K1 */ |
57 | __asm__ volatile ("add $27, %0, $0" : : "r"(tp)); /* Move tls to K1 */ |
| 37 | } |
58 | } |
| 38 | 59 | ||
| 39 | static inline void * __tls_get(void) |
60 | static inline tcb_t * __tcb_get(void) |
| 40 | { |
61 | { |
| 41 | void * retval; |
62 | void * retval; |
| 42 | 63 | ||
| 43 | __asm__ volatile("add %0, $27, $0" : "=r"(retval)); |
64 | __asm__ volatile("add %0, $27, $0" : "=r"(retval)); |
| - | 65 | ||
| 44 | return retval; |
66 | return (tcb_t *)(retval - MIPS_TP_OFFSET - sizeof(tcb_t)); |
| 45 | } |
67 | } |
| 46 | 68 | ||
| 47 | #endif |
69 | #endif |