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 * mappings between virtual addresses and physical addresses.
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 * mappings between virtual addresses and physical addresses.
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 * Functions here are mere wrappers that call the real implementation.
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 * Functions here are mere wrappers that call the real implementation.
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 * They however, define the single interface.
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 * They however, define the single interface.
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 */
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 */
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/*
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 * Note on memory prefetching and updating memory mappings, also described in:
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 * AMD x86-64 Architecture Programmer's Manual, Volume 2, System Programming,
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 * 7.2.1 Special Coherency Considerations.
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 *
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 * The processor which modifies a page table mapping can access prefetched data
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 * from the old mapping.  In order to prevent this, we place a memory barrier
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 * after a mapping is updated.
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 *
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 * We assume that the other processors are either not using the mapping yet
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 * (i.e. during the bootstrap) or are executing the TLB shootdown code.  While
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 * we don't care much about the former case, the processors in the latter case
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 * will do an implicit serialization by virtue of running the TLB shootdown
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 * interrupt handler.
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 */
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#include <mm/page.h>
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#include <mm/page.h>
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#include <arch/mm/page.h>
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#include <arch/mm/page.h>
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#include <arch/mm/asid.h>
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#include <arch/mm/asid.h>
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#include <mm/as.h>
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#include <mm/as.h>
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#include <mm/frame.h>
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#include <mm/frame.h>