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Rev 3655 | Rev 3906 | ||
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Line 37... | Line 37... | ||
37 | * devices and logic for dispatching interrupts to IRQ handlers |
37 | * devices and logic for dispatching interrupts to IRQ handlers |
38 | * defined by those devices. |
38 | * defined by those devices. |
39 | * |
39 | * |
40 | * This code is designed to support: |
40 | * This code is designed to support: |
41 | * - multiple devices sharing single IRQ |
41 | * - multiple devices sharing single IRQ |
42 | * - multiple IRQs per signle device |
42 | * - multiple IRQs per single device |
- | 43 | * - multiple instances of the same device |
|
43 | * |
44 | * |
44 | * |
45 | * |
45 | * Note about architectures. |
46 | * Note about architectures. |
46 | * |
47 | * |
47 | * Some architectures has the term IRQ well defined. Examples |
48 | * Some architectures has the term IRQ well defined. Examples |
Line 142... | Line 143... | ||
142 | irq->inr = -1; |
143 | irq->inr = -1; |
143 | irq->devno = -1; |
144 | irq->devno = -1; |
144 | irq->trigger = (irq_trigger_t) 0; |
145 | irq->trigger = (irq_trigger_t) 0; |
145 | irq->claim = NULL; |
146 | irq->claim = NULL; |
146 | irq->handler = NULL; |
147 | irq->handler = NULL; |
147 | irq->arg = NULL; |
148 | irq->instance = NULL; |
148 | irq->cir = NULL; |
149 | irq->cir = NULL; |
149 | irq->cir_arg = NULL; |
150 | irq->cir_arg = NULL; |
150 | irq->notif_cfg.notify = false; |
151 | irq->notif_cfg.notify = false; |
151 | irq->notif_cfg.answerbox = NULL; |
152 | irq->notif_cfg.answerbox = NULL; |
152 | irq->notif_cfg.code = NULL; |
153 | irq->notif_cfg.code = NULL; |
Line 304... | Line 305... | ||
304 | bool rv; |
305 | bool rv; |
305 | 306 | ||
306 | spinlock_lock(&irq->lock); |
307 | spinlock_lock(&irq->lock); |
307 | if (devno == -1) { |
308 | if (devno == -1) { |
308 | /* Invoked by irq_dispatch_and_lock(). */ |
309 | /* Invoked by irq_dispatch_and_lock(). */ |
- | 310 | rv = ((irq->inr == inr) && |
|
309 | rv = ((irq->inr == inr) && (irq->claim() == IRQ_ACCEPT)); |
311 | (irq->claim(irq->instance) == IRQ_ACCEPT)); |
310 | } else { |
312 | } else { |
311 | /* Invoked by irq_find_and_lock(). */ |
313 | /* Invoked by irq_find_and_lock(). */ |
312 | rv = ((irq->inr == inr) && (irq->devno == devno)); |
314 | rv = ((irq->inr == inr) && (irq->devno == devno)); |
313 | } |
315 | } |
314 | 316 | ||
Line 363... | Line 365... | ||
363 | bool rv; |
365 | bool rv; |
364 | 366 | ||
365 | spinlock_lock(&irq->lock); |
367 | spinlock_lock(&irq->lock); |
366 | if (devno == -1) { |
368 | if (devno == -1) { |
367 | /* Invoked by irq_dispatch_and_lock() */ |
369 | /* Invoked by irq_dispatch_and_lock() */ |
368 | rv = (irq->claim() == IRQ_ACCEPT); |
370 | rv = (irq->claim(irq->instance) == IRQ_ACCEPT); |
369 | } else { |
371 | } else { |
370 | /* Invoked by irq_find_and_lock() */ |
372 | /* Invoked by irq_find_and_lock() */ |
371 | rv = (irq->devno == devno); |
373 | rv = (irq->devno == devno); |
372 | } |
374 | } |
373 | 375 |