Rev 4148 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 4148 | Rev 4311 | ||
|---|---|---|---|
| Line 39... | Line 39... | ||
| 39 | #include <ddi/irq.h> |
39 | #include <ddi/irq.h> |
| 40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
| 41 | #include <mm/slab.h> |
41 | #include <mm/slab.h> |
| 42 | #include <ddi/device.h> |
42 | #include <ddi/device.h> |
| 43 | 43 | ||
| 44 | static indev_operations_t kbrdin_ops = { |
- | |
| 45 | .poll = NULL |
- | |
| 46 | }; |
- | |
| 47 | - | ||
| 48 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
44 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
| 49 | { |
45 | { |
| 50 | /* |
46 | /* |
| 51 | * Registers 8-15 will automatically issue the Point High |
47 | * Registers 8-15 will automatically issue the Point High |
| 52 | * command as their bit 3 is 1. |
48 | * command as their bit 3 is 1. |
| Line 80... | Line 76... | ||
| 80 | { |
76 | { |
| 81 | z8530_instance_t *instance = irq->instance; |
77 | z8530_instance_t *instance = irq->instance; |
| 82 | z8530_t *dev = instance->z8530; |
78 | z8530_t *dev = instance->z8530; |
| 83 | 79 | ||
| 84 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
80 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
| 85 | uint8_t x = z8530_read(&dev->ctl_a, RR8); |
81 | uint8_t data = z8530_read(&dev->ctl_a, RR8); |
| 86 | indev_push_character(&instance->kbrdin, x); |
82 | indev_push_character(instance->kbrdin, data); |
| 87 | } |
83 | } |
| 88 | } |
84 | } |
| 89 | 85 | ||
| 90 | /** Initialize z8530. */ |
86 | /** Initialize z8530. */ |
| 91 | indev_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
87 | z8530_instance_t *z8530_init(z8530_t *dev, inr_t inr, cir_t cir, void *cir_arg) |
| 92 | { |
88 | { |
| 93 | z8530_instance_t *instance |
89 | z8530_instance_t *instance |
| 94 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
90 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
| 95 | if (!instance) |
91 | if (instance) { |
| - | 92 | instance->z8530 = dev; |
|
| - | 93 | instance->kbrdin = NULL; |
|
| - | 94 | ||
| - | 95 | irq_initialize(&instance->irq); |
|
| - | 96 | instance->irq.devno = device_assign_devno(); |
|
| 96 | return false; |
97 | instance->irq.inr = inr; |
| - | 98 | instance->irq.claim = z8530_claim; |
|
| - | 99 | instance->irq.handler = z8530_irq_handler; |
|
| - | 100 | instance->irq.instance = instance; |
|
| - | 101 | instance->irq.cir = cir; |
|
| - | 102 | instance->irq.cir_arg = cir_arg; |
|
| - | 103 | } |
|
| 97 | 104 | ||
| - | 105 | return instance; |
|
| - | 106 | } |
|
| - | 107 | ||
| 98 | indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
108 | void z8530_wire(z8530_instance_t *instance, indev_t *kbrdin) |
| - | 109 | { |
|
| - | 110 | ASSERT(instance); |
|
| - | 111 | ASSERT(kbrdin); |
|
| 99 | 112 | ||
| 100 | instance->z8530 = dev; |
113 | instance->kbrdin = kbrdin; |
| 101 | 114 | ||
| 102 | irq_initialize(&instance->irq); |
- | |
| 103 | instance->irq.devno = device_assign_devno(); |
- | |
| 104 | instance->irq.inr = inr; |
- | |
| 105 | instance->irq.claim = z8530_claim; |
- | |
| 106 | instance->irq.handler = z8530_irq_handler; |
- | |
| 107 | instance->irq.instance = instance; |
- | |
| 108 | instance->irq.cir = cir; |
- | |
| 109 | instance->irq.cir_arg = cir_arg; |
- | |
| 110 | irq_register(&instance->irq); |
115 | irq_register(&instance->irq); |
| 111 | 116 | ||
| 112 | (void) z8530_read(&dev->ctl_a, RR8); |
117 | (void) z8530_read(&instance->z8530->ctl_a, RR8); |
| 113 | 118 | ||
| 114 | /* |
119 | /* |
| 115 | * Clear any pending TX interrupts or we never manage |
120 | * Clear any pending TX interrupts or we never manage |
| 116 | * to set FHC UART interrupt state to idle. |
121 | * to set FHC UART interrupt state to idle. |
| 117 | */ |
122 | */ |
| 118 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
123 | z8530_write(&instance->z8530->ctl_a, WR0, WR0_TX_IP_RST); |
| 119 | 124 | ||
| 120 | /* interrupt on all characters */ |
125 | /* interrupt on all characters */ |
| 121 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
126 | z8530_write(&instance->z8530->ctl_a, WR1, WR1_IARCSC); |
| 122 | 127 | ||
| 123 | /* 8 bits per character and enable receiver */ |
128 | /* 8 bits per character and enable receiver */ |
| 124 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
129 | z8530_write(&instance->z8530->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
| 125 | 130 | ||
| 126 | /* Master Interrupt Enable. */ |
131 | /* Master Interrupt Enable. */ |
| 127 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
132 | z8530_write(&instance->z8530->ctl_a, WR9, WR9_MIE); |
| 128 | - | ||
| 129 | return &instance->kbrdin; |
- | |
| 130 | } |
133 | } |
| 131 | 134 | ||
| 132 | /** @} |
135 | /** @} |
| 133 | */ |
136 | */ |