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24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genarch |
29 | /** @addtogroup genarch |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief Zilog 8530 serial controller driver. |
34 | * @brief Zilog 8530 serial controller driver. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #include <genarch/drivers/z8530/z8530.h> |
37 | #include <genarch/drivers/z8530/z8530.h> |
38 | #include <console/chardev.h> |
38 | #include <console/chardev.h> |
39 | #include <ddi/irq.h> |
39 | #include <ddi/irq.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <mm/slab.h> |
41 | #include <mm/slab.h> |
42 | 42 | ||
- | 43 | indev_operations_t kbrdin_ops = { |
|
- | 44 | .poll = NULL |
|
- | 45 | }; |
|
- | 46 | ||
43 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
47 | static inline void z8530_write(ioport8_t *ctl, uint8_t reg, uint8_t val) |
44 | { |
48 | { |
45 | /* |
49 | /* |
46 | * Registers 8-15 will automatically issue the Point High |
50 | * Registers 8-15 will automatically issue the Point High |
47 | * command as their bit 3 is 1. |
51 | * command as their bit 3 is 1. |
48 | */ |
52 | */ |
49 | pio_write_8(ctl, reg); /* select register */ |
53 | pio_write_8(ctl, reg); /* Select register */ |
50 | pio_write_8(ctl, val); /* write value */ |
54 | pio_write_8(ctl, val); /* Write value */ |
51 | } |
55 | } |
52 | 56 | ||
53 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
57 | static inline uint8_t z8530_read(ioport8_t *ctl, uint8_t reg) |
54 | { |
58 | { |
55 | /* |
59 | /* |
56 | * Registers 8-15 will automatically issue the Point High |
60 | * Registers 8-15 will automatically issue the Point High |
57 | * command as their bit 3 is 1. |
61 | * command as their bit 3 is 1. |
58 | */ |
62 | */ |
59 | pio_write_8(ctl, reg); /* select register */ |
63 | pio_write_8(ctl, reg); /* Select register */ |
60 | return pio_read_8(ctl); |
64 | return pio_read_8(ctl); |
61 | } |
65 | } |
62 | 66 | ||
63 | /** Initialize z8530. */ |
- | |
64 | bool |
- | |
65 | z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg, |
67 | static irq_ownership_t z8530_claim(irq_t *irq) |
66 | chardev_t *devout) |
- | |
67 | { |
68 | { |
68 | z8530_instance_t *instance; |
69 | z8530_instance_t *instance = irq->instance; |
- | 70 | z8530_t *dev = instance->z8530; |
|
- | 71 | ||
- | 72 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
|
- | 73 | return IRQ_ACCEPT; |
|
- | 74 | else |
|
- | 75 | return IRQ_DECLINE; |
|
- | 76 | } |
|
69 | 77 | ||
- | 78 | static void z8530_irq_handler(irq_t *irq) |
|
- | 79 | { |
|
- | 80 | z8530_instance_t *instance = irq->instance; |
|
- | 81 | z8530_t *dev = instance->z8530; |
|
- | 82 | ||
- | 83 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
|
- | 84 | uint8_t x = z8530_read(&dev->ctl_a, RR8); |
|
- | 85 | chardev_push_character(&instance->kbrdin, x); |
|
- | 86 | } |
|
- | 87 | } |
|
- | 88 | ||
- | 89 | /** Initialize z8530. */ |
|
- | 90 | indev_t *z8530_init(z8530_t *dev, devno_t devno, inr_t inr, cir_t cir, void *cir_arg) |
|
- | 91 | { |
|
- | 92 | z8530_instance_t *instance |
|
70 | instance = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
93 | = malloc(sizeof(z8530_instance_t), FRAME_ATOMIC); |
71 | if (!instance) |
94 | if (!instance) |
72 | return false; |
95 | return false; |
- | 96 | ||
- | 97 | indev_initialize("z8530", &instance->kbrdin, &kbrdin_ops); |
|
73 | 98 | ||
74 | instance->devno = devno; |
99 | instance->devno = devno; |
75 | instance->z8530 = dev; |
100 | instance->z8530 = dev; |
76 | instance->devout = devout; |
- | |
77 | 101 | ||
78 | irq_initialize(&instance->irq); |
102 | irq_initialize(&instance->irq); |
79 | instance->irq.devno = devno; |
103 | instance->irq.devno = devno; |
80 | instance->irq.inr = inr; |
104 | instance->irq.inr = inr; |
81 | instance->irq.claim = z8530_claim; |
105 | instance->irq.claim = z8530_claim; |
82 | instance->irq.handler = z8530_irq_handler; |
106 | instance->irq.handler = z8530_irq_handler; |
83 | instance->irq.instance = instance; |
107 | instance->irq.instance = instance; |
84 | instance->irq.cir = cir; |
108 | instance->irq.cir = cir; |
85 | instance->irq.cir_arg = cir_arg; |
109 | instance->irq.cir_arg = cir_arg; |
86 | irq_register(&instance->irq); |
110 | irq_register(&instance->irq); |
87 | 111 | ||
88 | (void) z8530_read(&dev->ctl_a, RR8); |
112 | (void) z8530_read(&dev->ctl_a, RR8); |
89 | 113 | ||
90 | /* |
114 | /* |
91 | * Clear any pending TX interrupts or we never manage |
115 | * Clear any pending TX interrupts or we never manage |
92 | * to set FHC UART interrupt state to idle. |
116 | * to set FHC UART interrupt state to idle. |
93 | */ |
117 | */ |
94 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
118 | z8530_write(&dev->ctl_a, WR0, WR0_TX_IP_RST); |
95 | 119 | ||
96 | /* interrupt on all characters */ |
120 | /* interrupt on all characters */ |
97 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
121 | z8530_write(&dev->ctl_a, WR1, WR1_IARCSC); |
98 | 122 | ||
99 | /* 8 bits per character and enable receiver */ |
123 | /* 8 bits per character and enable receiver */ |
100 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
124 | z8530_write(&dev->ctl_a, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
101 | 125 | ||
102 | /* Master Interrupt Enable. */ |
126 | /* Master Interrupt Enable. */ |
103 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
127 | z8530_write(&dev->ctl_a, WR9, WR9_MIE); |
104 | - | ||
105 | return true; |
- | |
106 | } |
128 | |
107 | - | ||
108 | irq_ownership_t z8530_claim(irq_t *irq) |
- | |
109 | { |
- | |
110 | z8530_instance_t *instance = irq->instance; |
- | |
111 | z8530_t *dev = instance->z8530; |
- | |
112 | - | ||
113 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) |
- | |
114 | return IRQ_ACCEPT; |
- | |
115 | else |
- | |
116 | return IRQ_DECLINE; |
- | |
117 | } |
- | |
118 | - | ||
119 | void z8530_irq_handler(irq_t *irq) |
- | |
120 | { |
- | |
121 | z8530_instance_t *instance = irq->instance; |
- | |
122 | z8530_t *dev = instance->z8530; |
- | |
123 | uint8_t x; |
- | |
124 | - | ||
125 | if (z8530_read(&dev->ctl_a, RR0) & RR0_RCA) { |
- | |
126 | x = z8530_read(&dev->ctl_a, RR8); |
- | |
127 | if (instance->devout) |
129 | return &instance->kbrdin; |
128 | chardev_push_character(instance->devout, x); |
- | |
129 | } |
- | |
130 | } |
130 | } |
131 | 131 | ||
132 | /** @} |
132 | /** @} |
133 | */ |
133 | */ |