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Line 735... Line 735...
735 
	 * Save TSTATE, TPC and TNPC aside.
 735 
	 * Save TSTATE, TPC and TNPC aside.
736 
	 */
 736 
	 */
737 
	rdpr %tstate, %g1
 737 
	rdpr %tstate, %g1
738 
	rdpr %tpc, %g2
 738 
	rdpr %tpc, %g2
739 
	rdpr %tnpc, %g3
 739 
	rdpr %tnpc, %g3
- 
 
 740 
	rd %y, %g4
740 
 
 741 
 
741 
	/*
 742 
	/*
742 
	 * The following memory accesses will not fault
 743 
	 * The following memory accesses will not fault
743 
	 * because special provisions are made to have
 744 
	 * because special provisions are made to have
744 
	 * the kernel stack of THREAD locked in DTLB.
 745 
	 * the kernel stack of THREAD locked in DTLB.
Line 752... Line 753...
752 
	 * This register is deprecated according to SPARC V9 specification
 753 
	 * This register is deprecated according to SPARC V9 specification
753 
	 * and is only present for backward compatibility with previous
 754 
	 * and is only present for backward compatibility with previous
754 
	 * versions of the SPARC architecture.
 755 
	 * versions of the SPARC architecture.
755 
	 * Surprisingly, gcc makes use of this register without a notice.
 756 
	 * Surprisingly, gcc makes use of this register without a notice.
756 
	 */
 757 
	 */
757 
	rd %y, %g4
 - 
 
758 
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
 758 
	stx %g4, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y]
759
759
760 
	wrpr %g0, 0, %tl
 760 
	wrpr %g0, 0, %tl
761 
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
 761 
	wrpr %g0, PSTATE_PRIV_BIT | PSTATE_PEF_BIT, %pstate
762 
	SAVE_GLOBALS
 762 
	SAVE_GLOBALS
Line 785... Line 785...
785 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
 785 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1
786 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
 786 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2
787 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
 787 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3
788 
 
 788 
 
789 
	/*
 789 
	/*
790 
	 * Restore Y.
 - 
 
791 
	 */
 - 
 
792 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
 - 
 
793 
	wr %g4, %y
 - 
 
794 
 
 - 
 
795 
	/*
 - 
 
796 
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
 790 
	 * Copy PSTATE.PEF to the in-register copy of TSTATE.
797 
	 */
 791 
	 */
798 
	and %l1, PSTATE_PEF_BIT, %l1
 792 
	and %l1, PSTATE_PEF_BIT, %l1
799 
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
 793 
	sllx %l1, TSTATE_PSTATE_SHIFT, %l1
800 
	sethi %hi(TSTATE_PEF_BIT), %g4
 794 
	sethi %hi(TSTATE_PEF_BIT), %g4
Line 806... Line 800...
806 
	 */
 800 
	 */
807 
	wrpr %g1, 0, %tstate
 801 
	wrpr %g1, 0, %tstate
808 
	wrpr %g2, 0, %tpc
 802 
	wrpr %g2, 0, %tpc
809 
	wrpr %g3, 0, %tnpc
 803 
	wrpr %g3, 0, %tnpc
810 
 
 804 
 
- 
 
 805 
	/*
- 
 
 806 
	 * Restore Y.
- 
 
 807 
	 */
- 
 
 808 
	ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_Y], %g4
- 
 
 809 
	wr %g4, %y
811 
 
 810 
 
812 
	/*
 811 
	/*
813 
	 * If OTHERWIN is zero, then all the userspace windows have been
 812 
	 * If OTHERWIN is zero, then all the userspace windows have been
814 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
 813 
	 * spilled to kernel memory (i.e. register window buffer). Moreover,
815 
	 * if the scheduler was called in the meantime, all valid windows
 814 
	 * if the scheduler was called in the meantime, all valid windows