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| Rev 2134 | Rev 2141 | ||
|---|---|---|---|
| Line 42... | Line 42... | ||
| 42 | #include <arch/asm.h> |
42 | #include <arch/asm.h> |
| 43 | #include <arch/barrier.h> |
43 | #include <arch/barrier.h> |
| 44 | #include <print.h> |
44 | #include <print.h> |
| 45 | #include <arch.h> |
45 | #include <arch.h> |
| 46 | #include <mm/tlb.h> |
46 | #include <mm/tlb.h> |
| 47 | #include <arch/mm/cache.h> |
- | |
| 48 | #include <config.h> |
47 | #include <config.h> |
| 49 | #include <synch/spinlock.h> |
48 | #include <synch/spinlock.h> |
| 50 | 49 | ||
| 51 | /** Register Interrupt Level Handler. |
50 | /** Register Interrupt Level Handler. |
| 52 | * |
51 | * |
| Line 89... | Line 88... | ||
| 89 | * it is one of the supported ones. |
88 | * it is one of the supported ones. |
| 90 | */ |
89 | */ |
| 91 | #ifdef CONFIG_SMP |
90 | #ifdef CONFIG_SMP |
| 92 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
91 | if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) { |
| 93 | tlb_shootdown_ipi_recv(); |
92 | tlb_shootdown_ipi_recv(); |
| 94 | #ifdef CONFIG_VIRT_IDX_DCACHE |
- | |
| 95 | } else if (data0 == (uintptr_t) dcache_shootdown_ipi_recv) { |
- | |
| 96 | dcache_shootdown_ipi_recv(); |
- | |
| 97 | #endif |
- | |
| 98 | } |
93 | } |
| 99 | #endif |
94 | #endif |
| 100 | } else { |
95 | } else { |
| 101 | /* |
96 | /* |
| 102 | * Spurious interrupt. |
97 | * Spurious interrupt. |