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Line 74... Line 74...
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	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! Disable interrupts and disable 32-bit address masking.
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	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! Disable interrupts and disable 32-bit address masking.
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	wrpr %g0, 0, %pil			! intialize %pil
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	wrpr %g0, 0, %pil			! intialize %pil
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	/*
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	/*
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	 * Copy the bootinfo structure passed from the boot loader
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	 * to the kernel bootinfo structure.
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	 */
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	brz %l7, 0f				! skip if you are not the bootstrap CPU
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	nop
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- 
 
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	sethi %hi(bootinfo), %o0
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	call memcpy
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	or %o0, %lo(bootinfo), %o0
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0:
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	/*
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	 * Switch to kernel trap table.
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	 * Switch to kernel trap table.
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	 */
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	 */
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	sethi %hi(trap_table), %g1
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	sethi %hi(trap_table), %g1
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	wrpr %g1, %lo(trap_table), %tba
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	wrpr %g1, %lo(trap_table), %tba
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	! write ITLB data and install the permanent kernel mapping in context 0
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	! write ITLB data and install the permanent kernel mapping in context 0
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	SET_TLB_DATA(g1, g2, TTE_L)		! use non-global mapping
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	SET_TLB_DATA(g1, g2, TTE_L)		! use non-global mapping
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	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG
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	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG
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	flush %g5
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	flush %g5
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	! switch to context 0
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	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	flush %g5
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	! ensure nucleus mapping
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	! enter nucleus - using context 0
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	wrpr %g0, 1, %tl
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	wrpr %g0, 1, %tl
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	! set context 1 in the primary context register
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	mov MEM_CONTEXT_TEMP, %g1
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	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	flush %g5
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	! demap context 1
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	! demap context 1
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
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	stxa %g0, [%g1] ASI_IMMU_DEMAP
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	stxa %g0, [%g1] ASI_IMMU_DEMAP
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	flush %g5
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	flush %g5
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	! set context 0 in the primary context register
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	! set context 0 in the primary context register
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	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	flush %g5
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	flush %g5
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	! set TL back to 0
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	! leave nucleus - using primary context, i.e. context 0
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	wrpr %g0, 0, %tl
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	wrpr %g0, 0, %tl
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	brz %l7, 1f				! skip if you are not the bootstrap CPU
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	brz %l7, 1f				! skip if you are not the bootstrap CPU
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	nop
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	nop
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- 
 
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	sethi %hi(bootinfo), %o0
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	call memcpy				! copy bootinfo
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	or %o0, %lo(bootinfo), %o0
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	call arch_pre_main
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	call arch_pre_main
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	nop
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	nop
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	call main_bsp
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	call main_bsp
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	nop
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	nop
Line 269... Line 252...
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	ldx [%g2], %g3
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	ldx [%g2], %g3
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	cmp %g3, %g1
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	cmp %g3, %g1
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	bne 2b
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	bne 2b
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	nop
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	nop
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 - 
 
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	/*
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	/*
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	 * Configure stack for the AP.
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	 * Configure stack for the AP.
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	 * The AP is expected to use the stack saved
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	 * The AP is expected to use the stack saved
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	 * in the ctx global variable.
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	 * in the ctx global variable.
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	 */
 261 
	 */