WebSVN – HelenOS – Diff – /trunk/kernel/arch/sparc64/src/mm/tlb.c



 
#ifdef CONFIG_TSB
#include <arch/mm/tsb.h>
#endif
 
static void dtlb_pte_copy(pte_t *, size_t, bool);
static void itlb_pte_copy(pte_t *, size_t);
static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *);
static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
    const char *);
static void do_fast_data_access_protection_fault(istate_t *,
    tlb_tag_access_reg_t, const char *);

 * @param t         Page Table Entry to be copied.
 * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
 * @param ro        If true, the entry will be created read-only, regardless
 *          of its w field.
 */
void dtlb_pte_copy(pte_t *t, size_t index, bool ro)
{
    tlb_tag_access_reg_t tag;
    tlb_data_t data;
    page_address_t pg;
    frame_address_t fr;

/** Copy PTE to ITLB.
 *
 * @param t     Page Table Entry to be copied.
 * @param index     Zero if lower 8K-subpage, one if higher 8K-subpage.
 */
void itlb_pte_copy(pte_t *t, size_t index)
{
    tlb_tag_access_reg_t tag;
    tlb_data_t data;
    page_address_t pg;
    frame_address_t fr;

 
/** ITLB miss handler. */
void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate)
{
    uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
    size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
    pte_t *t;
 
    page_table_lock(AS, true);
    t = page_mapping_find(AS, page_16k);
    if (t && PTE_EXECUTABLE(t)) {

 */
void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
{
    uintptr_t page_8k;
    uintptr_t page_16k;
    size_t index;
    pte_t *t;
 
    page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH;
    page_16k = ALIGN_DOWN(page_8k, PAGE_SIZE);
    index = tag.vpn % MMU_PAGES_PER_PAGE;

 * @param istate    Interrupted state saved on the stack.
 */
void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
{
    uintptr_t page_16k;
    size_t index;
    pte_t *t;
 
    page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE);
    index = tag.vpn % MMU_PAGES_PER_PAGE;   /* 16K-page emulation */
 

 *
 * @param asid      Address Space ID.
 * @param page      First page which to sweep out from ITLB and DTLB.
 * @param cnt       Number of ITLB and DTLB entries to invalidate.
 */
void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
{
    unsigned int i;
    tlb_context_reg_t pc_save, ctx;
   
    /* switch to nucleus because we are mapped by the primary context */

Rev 4397	Rev 4490
Line 52...	Line 52...
52		52
53	#ifdef CONFIG_TSB	53	#ifdef CONFIG_TSB
54	#include <arch/mm/tsb.h>	54	#include <arch/mm/tsb.h>
55	#endif	55	#endif
56		56
57	static void dtlb_pte_copy(pte_t *, index_t, bool);	57	static void dtlb_pte_copy(pte_t *, size_t, bool);
58	static void itlb_pte_copy(pte_t *, index_t);	58	static void itlb_pte_copy(pte_t *, size_t);
59	static void do_fast_instruction_access_mmu_miss_fault(istate_t , const char );	59	static void do_fast_instruction_access_mmu_miss_fault(istate_t , const char );
60	static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,	60	static void do_fast_data_access_mmu_miss_fault(istate_t *, tlb_tag_access_reg_t,
61	const char *);	61	const char *);
62	static void do_fast_data_access_protection_fault(istate_t *,	62	static void do_fast_data_access_protection_fault(istate_t *,
63	tlb_tag_access_reg_t, const char *);	63	tlb_tag_access_reg_t, const char *);
Line 128...	Line 128...
128	* @param t Page Table Entry to be copied.	128	* @param t Page Table Entry to be copied.
129	* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.	129	* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
130	* @param ro If true, the entry will be created read-only, regardless	130	* @param ro If true, the entry will be created read-only, regardless
131	* of its w field.	131	* of its w field.
132	*/	132	*/
133	void dtlb_pte_copy(pte_t *t, index_t index, bool ro)	133	void dtlb_pte_copy(pte_t *t, size_t index, bool ro)
134	{	134	{
135	tlb_tag_access_reg_t tag;	135	tlb_tag_access_reg_t tag;
136	tlb_data_t data;	136	tlb_data_t data;
137	page_address_t pg;	137	page_address_t pg;
138	frame_address_t fr;	138	frame_address_t fr;
Line 165...	Line 165...
165	/** Copy PTE to ITLB.	165	/** Copy PTE to ITLB.
166	*	166	*
167	* @param t Page Table Entry to be copied.	167	* @param t Page Table Entry to be copied.
168	* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.	168	* @param index Zero if lower 8K-subpage, one if higher 8K-subpage.
169	*/	169	*/
170	void itlb_pte_copy(pte_t *t, index_t index)	170	void itlb_pte_copy(pte_t *t, size_t index)
171	{	171	{
172	tlb_tag_access_reg_t tag;	172	tlb_tag_access_reg_t tag;
173	tlb_data_t data;	173	tlb_data_t data;
174	page_address_t pg;	174	page_address_t pg;
175	frame_address_t fr;	175	frame_address_t fr;
Line 198...	Line 198...
198		198
199	/** ITLB miss handler. */	199	/** ITLB miss handler. */
200	void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate)	200	void fast_instruction_access_mmu_miss(unative_t unused, istate_t *istate)
201	{	201	{
202	uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);	202	uintptr_t page_16k = ALIGN_DOWN(istate->tpc, PAGE_SIZE);
203	index_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;	203	size_t index = (istate->tpc >> MMU_PAGE_WIDTH) % MMU_PAGES_PER_PAGE;
204	pte_t *t;	204	pte_t *t;
205		205
206	page_table_lock(AS, true);	206	page_table_lock(AS, true);
207	t = page_mapping_find(AS, page_16k);	207	t = page_mapping_find(AS, page_16k);
208	if (t && PTE_EXECUTABLE(t)) {	208	if (t && PTE_EXECUTABLE(t)) {
Line 243...	Line 243...
243	*/	243	*/
244	void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)	244	void fast_data_access_mmu_miss(tlb_tag_access_reg_t tag, istate_t *istate)
245	{	245	{
246	uintptr_t page_8k;	246	uintptr_t page_8k;
247	uintptr_t page_16k;	247	uintptr_t page_16k;
248	index_t index;	248	size_t index;
249	pte_t *t;	249	pte_t *t;
250		250
251	page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH;	251	page_8k = (uint64_t) tag.vpn << MMU_PAGE_WIDTH;
252	page_16k = ALIGN_DOWN(page_8k, PAGE_SIZE);	252	page_16k = ALIGN_DOWN(page_8k, PAGE_SIZE);
253	index = tag.vpn % MMU_PAGES_PER_PAGE;	253	index = tag.vpn % MMU_PAGES_PER_PAGE;
Line 307...	Line 307...
307	* @param istate Interrupted state saved on the stack.	307	* @param istate Interrupted state saved on the stack.
308	*/	308	*/
309	void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)	309	void fast_data_access_protection(tlb_tag_access_reg_t tag, istate_t *istate)
310	{	310	{
311	uintptr_t page_16k;	311	uintptr_t page_16k;
312	index_t index;	312	size_t index;
313	pte_t *t;	313	pte_t *t;
314		314
315	page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE);	315	page_16k = ALIGN_DOWN((uint64_t) tag.vpn << MMU_PAGE_WIDTH, PAGE_SIZE);
316	index = tag.vpn % MMU_PAGES_PER_PAGE; /* 16K-page emulation */	316	index = tag.vpn % MMU_PAGES_PER_PAGE; /* 16K-page emulation */
317		317
Line 577...	Line 577...
577	*	577	*
578	* @param asid Address Space ID.	578	* @param asid Address Space ID.
579	* @param page First page which to sweep out from ITLB and DTLB.	579	* @param page First page which to sweep out from ITLB and DTLB.
580	* @param cnt Number of ITLB and DTLB entries to invalidate.	580	* @param cnt Number of ITLB and DTLB entries to invalidate.
581	*/	581	*/
582	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)	582	void tlb_invalidate_pages(asid_t asid, uintptr_t page, size_t cnt)
583	{	583	{
584	unsigned int i;	584	unsigned int i;
585	tlb_context_reg_t pc_save, ctx;	585	tlb_context_reg_t pc_save, ctx;
586		586
587	/* switch to nucleus because we are mapped by the primary context */	587	/* switch to nucleus because we are mapped by the primary context */

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/sparc64/src/mm/tlb.c – Rev 4397 → 4490