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Line 71... Line 71...
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        /*
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        /*
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         * Copy locked DTLB entries from the BSP.
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         * Copy locked DTLB entries from the BSP.
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         */    
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         */    
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        for (i = 0; i < bsp_locked_dtlb_entries; i++) {
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        for (i = 0; i < bsp_locked_dtlb_entries; i++) {
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            dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
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            dtlb_insert_mapping(bsp_locked_dtlb_entry[i].virt_page,
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                bsp_locked_dtlb_entry[i].phys_page,
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                bsp_locked_dtlb_entry[i].phys_page,
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                bsp_locked_dtlb_entry[i].pagesize_code, true,
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                bsp_locked_dtlb_entry[i].pagesize_code, true,
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                false);
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                false);
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        }
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        }
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#endif 
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#endif 
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    }
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    }
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}
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}
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    struct {
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    struct {
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        int pagesize_code;
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        int pagesize_code;
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        size_t increment;
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        size_t increment;
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        count_t count;
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        count_t count;
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    } sizemap[] = {
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    } sizemap[] = {
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        { PAGESIZE_8K, 0, 1 },          /* 8K */
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        { PAGESIZE_8K, 0, 1 },              /* 8K */
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        { PAGESIZE_8K, PAGE_SIZE, 2 },      /* 16K */
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        { PAGESIZE_8K, MMU_PAGE_SIZE, 2 },      /* 16K */
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        { PAGESIZE_8K, PAGE_SIZE, 4 },      /* 32K */
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        { PAGESIZE_8K, MMU_PAGE_SIZE, 4 },      /* 32K */
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        { PAGESIZE_64K, 0, 1},          /* 64K */
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        { PAGESIZE_64K, 0, 1},              /* 64K */
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        { PAGESIZE_64K, 8 * PAGE_SIZE, 2 }, /* 128K */
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        { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 2 },     /* 128K */
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        { PAGESIZE_64K, 8 * PAGE_SIZE, 4 }, /* 256K */
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        { PAGESIZE_64K, 8 * MMU_PAGE_SIZE, 4 },     /* 256K */
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        { PAGESIZE_512K, 0, 1 },        /* 512K */
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        { PAGESIZE_512K, 0, 1 },            /* 512K */
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        { PAGESIZE_512K, 64 * PAGE_SIZE, 2 },   /* 1M */
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        { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 2 },   /* 1M */
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        { PAGESIZE_512K, 64 * PAGE_SIZE, 4 },   /* 2M */
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        { PAGESIZE_512K, 64 * MMU_PAGE_SIZE, 4 },   /* 2M */
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        { PAGESIZE_4M, 0, 1 },          /* 4M */
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        { PAGESIZE_4M, 0, 1 },              /* 4M */
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        { PAGESIZE_4M, 512 * PAGE_SIZE, 2 } /* 8M */
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        { PAGESIZE_4M, 512 * MMU_PAGE_SIZE, 2 }     /* 8M */
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    };
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    };
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    ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
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    ASSERT(ALIGN_UP(physaddr, MMU_PAGE_SIZE) == physaddr);
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    ASSERT(size <= 8 * 1024 * 1024);
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    ASSERT(size <= 8 * 1024 * 1024);
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    if (size <= FRAME_SIZE)
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    if (size <= MMU_FRAME_SIZE)
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        order = 0;
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        order = 0;
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    else
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    else
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        order = (fnzb64(size - 1) + 1) - FRAME_WIDTH;
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        order = (fnzb64(size - 1) + 1) - MMU_FRAME_WIDTH;
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    /*
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    /*
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     * Use virtual addresses that are beyond the limit of physical memory.
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     * Use virtual addresses that are beyond the limit of physical memory.
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     * Thus, the physical address space will not be wasted by holes created
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     * Thus, the physical address space will not be wasted by holes created
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     * by frame_alloc().
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     * by frame_alloc().
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     */
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     */
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    ASSERT(PA2KA(last_frame));
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    ASSERT(PA2KA(last_frame));
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    uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame), 1 << (order + FRAME_WIDTH));
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    uintptr_t virtaddr = ALIGN_UP(PA2KA(last_frame),
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        1 << (order + FRAME_WIDTH));
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    last_frame = ALIGN_UP(KA2PA(virtaddr) + size, 1 << (order + FRAME_WIDTH));
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    last_frame = ALIGN_UP(KA2PA(virtaddr) + size,
- 
 
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        1 << (order + FRAME_WIDTH));
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    for (i = 0; i < sizemap[order].count; i++) {
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    for (i = 0; i < sizemap[order].count; i++) {
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        /*
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        /*
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         * First, insert the mapping into DTLB.
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         * First, insert the mapping into DTLB.
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         */
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         */
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        dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
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        dtlb_insert_mapping(virtaddr + i * sizemap[order].increment,
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            physaddr + i * sizemap[order].increment,
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            physaddr + i * sizemap[order].increment,
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            sizemap[order].pagesize_code, true, false);
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            sizemap[order].pagesize_code, true, false);
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#ifdef CONFIG_SMP  
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#ifdef CONFIG_SMP  
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        /*
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        /*
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         * Second, save the information about the mapping for APs.
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         * Second, save the information about the mapping for APs.
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         */
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         */
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page =
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            virtaddr + i * sizemap[order].increment;
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            virtaddr + i * sizemap[order].increment;
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page =
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            physaddr + i * sizemap[order].increment;
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            physaddr + i * sizemap[order].increment;
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
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        bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code =
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            sizemap[order].pagesize_code;
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            sizemap[order].pagesize_code;
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        bsp_locked_dtlb_entries++;
 160 
        bsp_locked_dtlb_entries++;
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#endif
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#endif
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    }
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    }
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    return virtaddr;
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    return virtaddr;