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Rev 1861 | Rev 1904 | ||
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48 | 48 | ||
49 | /* VA's used with ASI_UDB_INTR_W register. */ |
49 | /* VA's used with ASI_UDB_INTR_W register. */ |
50 | #define ASI_UDB_INTR_W_DATA_0 0x40 |
50 | #define ASI_UDB_INTR_W_DATA_0 0x40 |
51 | #define ASI_UDB_INTR_W_DATA_1 0x50 |
51 | #define ASI_UDB_INTR_W_DATA_1 0x50 |
52 | #define ASI_UDB_INTR_W_DATA_2 0x60 |
52 | #define ASI_UDB_INTR_W_DATA_2 0x60 |
- | 53 | #define ASI_UDB_INTR_W_DISPATCH 0x70 |
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53 | 54 | ||
54 | /* VA's used with ASI_UDB_INTR_R register. */ |
55 | /* VA's used with ASI_UDB_INTR_R register. */ |
55 | #define ASI_UDB_INTR_R_DATA_0 0x40 |
56 | #define ASI_UDB_INTR_R_DATA_0 0x40 |
56 | #define ASI_UDB_INTR_R_DATA_1 0x50 |
57 | #define ASI_UDB_INTR_R_DATA_1 0x50 |
57 | #define ASI_UDB_INTR_R_DATA_2 0x60 |
58 | #define ASI_UDB_INTR_R_DATA_2 0x60 |
58 | 59 | ||
- | 60 | /* Shifts in the Interrupt Vector Dispatch virtual address. */ |
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- | 61 | #define INTR_VEC_DISPATCH_MID_SHIFT 14 |
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- | 62 | ||
- | 63 | /* Bits in the Interrupt Dispatch Status register. */ |
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- | 64 | #define INTR_DISPATCH_STATUS_NACK 0x2 |
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- | 65 | #define INTR_DISPATCH_STATUS_BUSY 0x1 |
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- | 66 | ||
59 | #define TT_INTERRUPT_LEVEL_1 0x41 |
67 | #define TT_INTERRUPT_LEVEL_1 0x41 |
60 | #define TT_INTERRUPT_LEVEL_2 0x42 |
68 | #define TT_INTERRUPT_LEVEL_2 0x42 |
61 | #define TT_INTERRUPT_LEVEL_3 0x43 |
69 | #define TT_INTERRUPT_LEVEL_3 0x43 |
62 | #define TT_INTERRUPT_LEVEL_4 0x44 |
70 | #define TT_INTERRUPT_LEVEL_4 0x44 |
63 | #define TT_INTERRUPT_LEVEL_5 0x45 |
71 | #define TT_INTERRUPT_LEVEL_5 0x45 |