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33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_sparc64_REGDEF_H_ |
35 | #ifndef KERN_sparc64_REGDEF_H_ |
36 | #define KERN_sparc64_REGDEF_H_ |
36 | #define KERN_sparc64_REGDEF_H_ |
37 | 37 | ||
38 | #define PSTATE_IE_BIT (1<<1) |
38 | #define PSTATE_IE_BIT (1 << 1) |
39 | #define PSTATE_AM_BIT (1<<3) |
39 | #define PSTATE_AM_BIT (1 << 3) |
40 | 40 | ||
41 | #define PSTATE_AG_BIT (1<<0) |
41 | #define PSTATE_AG_BIT (1 << 0) |
42 | #define PSTATE_IG_BIT (1<<11) |
42 | #define PSTATE_IG_BIT (1 << 11) |
43 | #define PSTATE_MG_BIT (1<<10) |
43 | #define PSTATE_MG_BIT (1 << 10) |
44 | 44 | ||
45 | #define PSTATE_PRIV_BIT (1<<2) |
45 | #define PSTATE_PRIV_BIT (1 << 2) |
46 | #define PSTATE_PEF_BIT (1<<4) |
46 | #define PSTATE_PEF_BIT (1 << 4) |
47 | 47 | ||
48 | #define TSTATE_PSTATE_SHIFT 8 |
48 | #define TSTATE_PSTATE_SHIFT 8 |
49 | #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT<<TSTATE_PSTATE_SHIFT) |
49 | #define TSTATE_PRIV_BIT (PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT) |
50 | #define TSTATE_IE_BIT (PSTATE_IE_BIT<<TSTATE_PSTATE_SHIFT) |
50 | #define TSTATE_IE_BIT (PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT) |
51 | #define TSTATE_PEF_BIT (PSTATE_PEF_BIT<<TSTATE_PSTATE_SHIFT) |
51 | #define TSTATE_PEF_BIT (PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT) |
52 | 52 | ||
53 | #define TSTATE_CWP_MASK 0x1f |
53 | #define TSTATE_CWP_MASK 0x1f |
54 | 54 | ||
55 | #define WSTATE_NORMAL(n) (n) |
55 | #define WSTATE_NORMAL(n) (n) |
56 | #define WSTATE_OTHER(n) ((n)<<3) |
56 | #define WSTATE_OTHER(n) ((n) << 3) |
57 | 57 | ||
58 | #define UPA_CONFIG_MID_SHIFT 17 |
58 | #define UPA_CONFIG_MID_SHIFT 17 |
59 | #define UPA_CONFIG_MID_MASK 0x1f |
59 | #define UPA_CONFIG_MID_MASK 0x1f |
60 | 60 | ||
61 | #endif |
61 | #endif |