Subversion Repositories HelenOS

Rev

Rev 1822 | Rev 1851 | Go to most recent revision | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1822 Rev 1823
Line 33... Line 33...
33 
 */
 33 
 */
34 
 
 34 
 
35 
#ifndef __sparc64_TLB_H__
 35 
#ifndef __sparc64_TLB_H__
36 
#define __sparc64_TLB_H__
 36 
#define __sparc64_TLB_H__
37 
 
 37 
 
38 
#include <arch/mm/tte.h>
 - 
 
39 
#include <arch/mm/mmu.h>
 - 
 
40 
#include <arch/mm/page.h>
 - 
 
41 
#include <arch/asm.h>
 - 
 
42 
#include <arch/barrier.h>
 - 
 
43 
#include <arch/types.h>
 - 
 
44 
#include <typedefs.h>
 - 
 
45 
 
 38 
 
46 
#define ITLB_ENTRY_COUNT        64
 39 
#define ITLB_ENTRY_COUNT        64
47 
#define DTLB_ENTRY_COUNT        64
 40 
#define DTLB_ENTRY_COUNT        64
48 
 
 41 
 
- 
 
 42 
#define MEM_CONTEXT_KERNEL      0
- 
 
 43 
#define MEM_CONTEXT_TEMP        1
- 
 
 44 
 
49 
/** Page sizes. */
 45 
/** Page sizes. */
50 
#define PAGESIZE_8K 0
 46 
#define PAGESIZE_8K 0
51 
#define PAGESIZE_64K    1
 47 
#define PAGESIZE_64K    1
52 
#define PAGESIZE_512K   2
 48 
#define PAGESIZE_512K   2
53 
#define PAGESIZE_4M 3
 49 
#define PAGESIZE_4M 3
54 
 
 50 
 
55 
/** Bit width of the TLB-locked portion of kernel address space. */
 51 
/** Bit width of the TLB-locked portion of kernel address space. */
56 
#define KERNEL_PAGE_WIDTH       22  /* 4M */
 52 
#define KERNEL_PAGE_WIDTH       22  /* 4M */
57 
 
 53 
 
- 
 
 54 
/* TLB Demap Operation types. */
- 
 
 55 
#define TLB_DEMAP_PAGE      0
- 
 
 56 
#define TLB_DEMAP_CONTEXT   1
- 
 
 57 
 
- 
 
 58 
#define TLB_DEMAP_TYPE_SHIFT    6
- 
 
 59 
 
- 
 
 60 
/* TLB Demap Operation Context register encodings. */
- 
 
 61 
#define TLB_DEMAP_PRIMARY   0
- 
 
 62 
#define TLB_DEMAP_SECONDARY 1
- 
 
 63 
#define TLB_DEMAP_NUCLEUS   2
- 
 
 64 
 
- 
 
 65 
#define TLB_DEMAP_CONTEXT_SHIFT 4
- 
 
 66 
 
- 
 
 67 
/* TLB Tag Access shifts */
- 
 
 68 
#define TLB_TAG_ACCESS_CONTEXT_SHIFT    0
- 
 
 69 
#define TLB_TAG_ACCESS_VPN_SHIFT    13
- 
 
 70 
 
- 
 
 71 
#ifndef __ASM__
- 
 
 72 
 
- 
 
 73 
#include <arch/mm/tte.h>
- 
 
 74 
#include <arch/mm/mmu.h>
- 
 
 75 
#include <arch/mm/page.h>
- 
 
 76 
#include <arch/asm.h>
- 
 
 77 
#include <arch/barrier.h>
- 
 
 78 
#include <arch/types.h>
- 
 
 79 
#include <typedefs.h>
- 
 
 80 
 
58 
union tlb_context_reg {
 81 
union tlb_context_reg {
59 
    uint64_t v;
 82 
    uint64_t v;
60 
    struct {
 83 
    struct {
61 
        unsigned long : 51;
 84 
        unsigned long : 51;
62 
        unsigned context : 13;      /**< Context/ASID. */
 85 
        unsigned context : 13;      /**< Context/ASID. */
Line 88... Line 111...
88 
    } __attribute__ ((packed));
 111 
    } __attribute__ ((packed));
89 
};
 112 
};
90 
typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
 113 
typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
91 
typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
 114 
typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
92 
 
 115 
 
93 
/** TLB Demap Operation types. */
 - 
 
94 
#define TLB_DEMAP_PAGE      0
 - 
 
95 
#define TLB_DEMAP_CONTEXT   1
 - 
 
96 
 
 - 
 
97 
/** TLB Demap Operation Context register encodings. */
 - 
 
98 
#define TLB_DEMAP_PRIMARY   0
 - 
 
99 
#define TLB_DEMAP_SECONDARY 1
 - 
 
100 
#define TLB_DEMAP_NUCLEUS   2
 - 
 
101 
 
 116 
 
102 
/** TLB Demap Operation Address. */
 117 
/** TLB Demap Operation Address. */
103 
union tlb_demap_addr {
 118 
union tlb_demap_addr {
104 
    uint64_t value;
 119 
    uint64_t value;
105 
    struct {
 120 
    struct {
Line 382... Line 397...
382 
   
 397 
   
383 
    da.type = type;
 398 
    da.type = type;
384 
    da.context = context_encoding;
 399 
    da.context = context_encoding;
385 
    da.vpn = pg.vpn;
 400 
    da.vpn = pg.vpn;
386 
   
 401 
   
387 
    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
 402 
    asi_u64_write(ASI_IMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */
388 
    flush();
 403 
    flush();
389 
}
 404 
}
390 
 
 405 
 
391 
/** Perform DMMU TLB Demap Operation.
 406 
/** Perform DMMU TLB Demap Operation.
392 
 *
 407 
 *
Line 404... Line 419...
404 
   
 419 
   
405 
    da.type = type;
 420 
    da.type = type;
406 
    da.context = context_encoding;
 421 
    da.context = context_encoding;
407 
    da.vpn = pg.vpn;
 422 
    da.vpn = pg.vpn;
408 
   
 423 
   
409 
    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
 424 
    asi_u64_write(ASI_DMMU_DEMAP, da.value, 0); /* da.value is the address within the ASI */
410 
    membar();
 425 
    membar();
411 
}
 426 
}
412 
 
 427 
 
413 
extern void fast_instruction_access_mmu_miss(void);
 428 
extern void fast_instruction_access_mmu_miss(void);
414 
extern void fast_data_access_mmu_miss(void);
 429 
extern void fast_data_access_mmu_miss(void);
415 
extern void fast_data_access_protection(void);
 430 
extern void fast_data_access_protection(void);
416 
 
 431 
 
417 
extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
 432 
extern void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable);
418 
 
 433 
 
- 
 
 434 
#endif /* !def __ASM__ */
- 
 
 435 
 
419 
#endif
 436 
#endif
420 
 
 437 
 
421 
/** @}
 438 
/** @}
422 
 */
 439 
 */