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| 52 | * The FLUSH instruction takes address parameter. |
52 | * The FLUSH instruction takes address parameter. |
| 53 | * As such, it may trap if the address is not found in DTLB. |
53 | * As such, it may trap if the address is not found in DTLB. |
| 54 | * However, JPS1 implementations are free to ignore the trap. |
54 | * However, JPS1 implementations are free to ignore the trap. |
| 55 | */ |
55 | */ |
| 56 | 56 | ||
| 57 | /* |
- | |
| 58 | * %i7 should provide address that is always mapped in DTLB |
- | |
| 59 | * as it is a pointer to kernel code. |
- | |
| 60 | */ |
- | |
| 61 | __asm__ volatile ("flush %i7\n"); |
57 | __asm__ volatile ("flush %0\n" :: "r" (0x400000)); |
| 62 | } |
58 | } |
| 63 | 59 | ||
| 64 | /** Memory Barrier instruction. */ |
60 | /** Memory Barrier instruction. */ |
| 65 | static inline void membar(void) |
61 | static inline void membar(void) |
| 66 | { |
62 | { |