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Line 40... | Line 40... | ||
40 | #define OFFSET_S6 0x20 |
40 | #define OFFSET_S6 0x20 |
41 | #define OFFSET_S7 0x24 |
41 | #define OFFSET_S7 0x24 |
42 | #define OFFSET_S8 0x28 |
42 | #define OFFSET_S8 0x28 |
43 | #define OFFSET_GP 0x2c |
43 | #define OFFSET_GP 0x2c |
44 | 44 | ||
- | 45 | #ifdef KERNEL |
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- | 46 | # define OFFSET_IPL 0x30 |
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- | 47 | #else |
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- | 48 | # define OFFSET_TLS 0x30 |
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- | 49 | ||
- | 50 | # define OFFSET_F20 0x34 |
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- | 51 | # define OFFSET_F21 0x38 |
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- | 52 | # define OFFSET_F22 0x3c |
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- | 53 | # define OFFSET_F23 0x40 |
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- | 54 | # define OFFSET_F24 0x44 |
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- | 55 | # define OFFSET_F25 0x48 |
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- | 56 | # define OFFSET_F26 0x4c |
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- | 57 | # define OFFSET_F27 0x50 |
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- | 58 | # define OFFSET_F28 0x54 |
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- | 59 | # define OFFSET_F29 0x58 |
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- | 60 | # define OFFSET_F30 0x5c |
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- | 61 | #endif /* KERNEL */ |
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- | 62 | ||
45 | /* istate_t */ |
63 | /* istate_t */ |
46 | #define EOFFSET_AT 0x0 |
64 | #define EOFFSET_AT 0x0 |
47 | #define EOFFSET_V0 0x4 |
65 | #define EOFFSET_V0 0x4 |
48 | #define EOFFSET_V1 0x8 |
66 | #define EOFFSET_V1 0x8 |
49 | #define EOFFSET_A0 0xc |
67 | #define EOFFSET_A0 0xc |
Line 77... | Line 95... | ||
77 | #define EOFFSET_STATUS 0x7c |
95 | #define EOFFSET_STATUS 0x7c |
78 | #define EOFFSET_EPC 0x80 |
96 | #define EOFFSET_EPC 0x80 |
79 | #define EOFFSET_K1 0x84 |
97 | #define EOFFSET_K1 0x84 |
80 | #define REGISTER_SPACE 136 |
98 | #define REGISTER_SPACE 136 |
81 | 99 | ||
- | 100 | #ifdef __ASM__ |
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- | 101 | ||
- | 102 | #include <arch/asm/regname.h> |
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- | 103 | ||
- | 104 | # ctx: address of the structure with saved context |
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- | 105 | .macro CONTEXT_SAVE_ARCH_CORE ctx:req |
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- | 106 | sw $s0,OFFSET_S0(\ctx) |
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- | 107 | sw $s1,OFFSET_S1(\ctx) |
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- | 108 | sw $s2,OFFSET_S2(\ctx) |
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- | 109 | sw $s3,OFFSET_S3(\ctx) |
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- | 110 | sw $s4,OFFSET_S4(\ctx) |
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- | 111 | sw $s5,OFFSET_S5(\ctx) |
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- | 112 | sw $s6,OFFSET_S6(\ctx) |
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- | 113 | sw $s7,OFFSET_S7(\ctx) |
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- | 114 | sw $s8,OFFSET_S8(\ctx) |
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- | 115 | sw $gp,OFFSET_GP(\ctx) |
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- | 116 | ||
- | 117 | #ifndef KERNEL |
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- | 118 | sw $k1,OFFSET_TLS(\ctx) |
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- | 119 | ||
- | 120 | # ifdef CONFIG_MIPS_FPU |
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- | 121 | mfc1 $t0,$20 |
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- | 122 | sw $t0, OFFSET_F20(\ctx) |
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- | 123 | ||
- | 124 | mfc1 $t0,$21 |
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- | 125 | sw $t0, OFFSET_F21(\ctx) |
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- | 126 | ||
- | 127 | mfc1 $t0,$22 |
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- | 128 | sw $t0, OFFSET_F22(\ctx) |
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- | 129 | ||
- | 130 | mfc1 $t0,$23 |
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- | 131 | sw $t0, OFFSET_F23(\ctx) |
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- | 132 | ||
- | 133 | mfc1 $t0,$24 |
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- | 134 | sw $t0, OFFSET_F24(\ctx) |
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- | 135 | ||
- | 136 | mfc1 $t0,$25 |
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- | 137 | sw $t0, OFFSET_F25(\ctx) |
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- | 138 | ||
- | 139 | mfc1 $t0,$26 |
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- | 140 | sw $t0, OFFSET_F26(\ctx) |
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- | 141 | ||
- | 142 | mfc1 $t0,$27 |
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- | 143 | sw $t0, OFFSET_F27(\ctx) |
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- | 144 | ||
- | 145 | mfc1 $t0,$28 |
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- | 146 | sw $t0, OFFSET_F28(\ctx) |
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- | 147 | ||
- | 148 | mfc1 $t0,$29 |
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- | 149 | sw $t0, OFFSET_F29(\ctx) |
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- | 150 | ||
- | 151 | mfc1 $t0,$30 |
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- | 152 | sw $t0, OFFSET_F30(\ctx) |
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- | 153 | # endif /* CONFIG_MIPS_FPU */ |
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- | 154 | #endif /* KERNEL */ |
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- | 155 | ||
- | 156 | sw $ra,OFFSET_PC(\ctx) |
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- | 157 | sw $sp,OFFSET_SP(\ctx) |
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- | 158 | .endm |
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- | 159 | ||
- | 160 | # ctx: address of the structure with saved context |
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- | 161 | .macro CONTEXT_RESTORE_ARCH_CORE ctx:req |
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- | 162 | lw $s0,OFFSET_S0(\ctx) |
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- | 163 | lw $s1,OFFSET_S1(\ctx) |
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- | 164 | lw $s2,OFFSET_S2(\ctx) |
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- | 165 | lw $s3,OFFSET_S3(\ctx) |
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- | 166 | lw $s4,OFFSET_S4(\ctx) |
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- | 167 | lw $s5,OFFSET_S5(\ctx) |
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- | 168 | lw $s6,OFFSET_S6(\ctx) |
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- | 169 | lw $s7,OFFSET_S7(\ctx) |
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- | 170 | lw $s8,OFFSET_S8(\ctx) |
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- | 171 | lw $gp,OFFSET_GP(\ctx) |
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- | 172 | #ifndef KERNEL |
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- | 173 | lw $k1,OFFSET_TLS(\ctx) |
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- | 174 | ||
- | 175 | # ifdef CONFIG_MIPS_FPU |
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- | 176 | lw $t0, OFFSET_F20(\ctx) |
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- | 177 | mtc1 $t0,$20 |
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- | 178 | ||
- | 179 | lw $t0, OFFSET_F21(\ctx) |
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- | 180 | mtc1 $t0,$21 |
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- | 181 | ||
- | 182 | lw $t0, OFFSET_F22(\ctx) |
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- | 183 | mtc1 $t0,$22 |
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- | 184 | ||
- | 185 | lw $t0, OFFSET_F23(\ctx) |
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- | 186 | mtc1 $t0,$23 |
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- | 187 | ||
- | 188 | lw $t0, OFFSET_F24(\ctx) |
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- | 189 | mtc1 $t0,$24 |
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- | 190 | ||
- | 191 | lw $t0, OFFSET_F25(\ctx) |
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- | 192 | mtc1 $t0,$25 |
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- | 193 | ||
- | 194 | lw $t0, OFFSET_F26(\ctx) |
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- | 195 | mtc1 $t0,$26 |
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- | 196 | ||
- | 197 | lw $t0, OFFSET_F27(\ctx) |
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- | 198 | mtc1 $t0,$27 |
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- | 199 | ||
- | 200 | lw $t0, OFFSET_F28(\ctx) |
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- | 201 | mtc1 $t0,$28 |
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- | 202 | ||
- | 203 | lw $t0, OFFSET_F29(\ctx) |
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- | 204 | mtc1 $t0,$29 |
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- | 205 | ||
- | 206 | lw $t0, OFFSET_F30(\ctx) |
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- | 207 | mtc1 $t0,$30 |
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- | 208 | # endif /* CONFIG_MIPS_FPU */ |
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- | 209 | ||
- | 210 | #endif /* KERNEL */ |
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- | 211 | lw $ra,OFFSET_PC(\ctx) |
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- | 212 | lw $sp,OFFSET_SP(\ctx) |
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- | 213 | .endm |
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- | 214 | ||
- | 215 | #endif |
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- | 216 | ||
- | 217 | ||
82 | #endif |
218 | #endif |