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| Rev 2101 | Rev 2107 | ||
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| 110 | */ |
110 | */ |
| 111 | 111 | ||
| 112 | /* |
112 | /* |
| 113 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
113 | * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot() |
| 114 | */ |
114 | */ |
| 115 | *((uint16_t *) (PA2KA(0x467+0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
115 | *((uint16_t *) (PA2KA(0x467 + 0))) = ((uintptr_t) ap_boot) >> 4; /* segment */ |
| 116 | *((uint16_t *) (PA2KA(0x467+2))) = 0; /* offset */ |
116 | *((uint16_t *) (PA2KA(0x467 + 2))) = 0; /* offset */ |
| 117 | 117 | ||
| 118 | /* |
118 | /* |
| 119 | * Save 0xa to address 0xf of the CMOS RAM. |
119 | * Save 0xa to address 0xf of the CMOS RAM. |
| 120 | * BIOS will not do the POST after the INIT signal. |
120 | * BIOS will not do the POST after the INIT signal. |
| 121 | */ |
121 | */ |
| 122 | outb(0x70,0xf); |
122 | outb(0x70, 0xf); |
| 123 | outb(0x71,0xa); |
123 | outb(0x71, 0xa); |
| 124 | 124 | ||
| 125 | pic_disable_irqs(0xffff); |
125 | pic_disable_irqs(0xffff); |
| 126 | apic_init(); |
126 | apic_init(); |
| 127 | 127 | ||
| 128 | for (i = 0; i < ops->cpu_count(); i++) { |
128 | for (i = 0; i < ops->cpu_count(); i++) { |