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Line 46... | Line 46... | ||
46 | void tlb_invalidate_all(void) |
46 | void tlb_invalidate_all(void) |
47 | { |
47 | { |
48 | asm volatile ( |
48 | asm volatile ( |
49 | "eor r1, r1\n" |
49 | "eor r1, r1\n" |
50 | "mcr p15, 0, r1, c8, c7, 0\n" |
50 | "mcr p15, 0, r1, c8, c7, 0\n" |
51 | : : : "r1" |
51 | ::: "r1" |
52 | ); |
52 | ); |
53 | } |
53 | } |
54 | 54 | ||
55 | /** Invalidate all entries in TLB that belong to specified address space. |
55 | /** Invalidate all entries in TLB that belong to specified address space. |
56 | * |
56 | * |
Line 66... | Line 66... | ||
66 | * @param page Virtual adress of the page |
66 | * @param page Virtual adress of the page |
67 | */ |
67 | */ |
68 | static inline void invalidate_page(uintptr_t page) |
68 | static inline void invalidate_page(uintptr_t page) |
69 | { |
69 | { |
70 | asm volatile ( |
70 | asm volatile ( |
71 | "mcr p15, 0, %0, c8, c7, 1" |
71 | "mcr p15, 0, %[page], c8, c7, 1\n" |
72 | : |
- | |
73 | : "r" (page) |
72 | :: [page] "r" (page) |
74 | ); |
73 | ); |
75 | } |
74 | } |
76 | 75 | ||
77 | /** Invalidate TLB entries for specified page range belonging to specified |
76 | /** Invalidate TLB entries for specified page range belonging to specified |
78 | * address space. |
77 | * address space. |